SoC Senior Design and Integration Engineer, Google Cloud
Job Description
Google | Bengaluru, Karnataka, India. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 5 years of experience in ASIC/SoC development with Verilog/SystemVerilog. Experience in one or more SoC Integration domains and flows (Clocking or debug or fabrics/NoC or Security or low power methodologies). Experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT). In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. In this role, you will be part of a team developing SoCs used to accelerate machine learning computation in data centers. You will solve technical problems with innovative and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind. You will collaborate with members of architecture, verification, power and performance, physical design etc. to specify and deliver high quality designs for next generation data center accelerators.
Locations
- Bengaluru, Karnataka, India
Salary
Salary not disclosed
Estimated Salary Rangemedium confidence
40,000,000 - 60,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- ASIC/SoC developmentadvanced (Hardware Design)
- Verilog/SystemVerilogadvanced (Programming)
- SoC Integrationadvanced (Hardware Design)
- ASIC design verificationintermediate (Verification)
- synthesisintermediate (Hardware Design)
- timing/power analysisintermediate (Hardware Design)
- Design for Testing (DFT)intermediate (Hardware Design)
- Pythonintermediate (Programming)
- C/C++intermediate (Programming)
- Perlintermediate (Programming)
- bus architecturesintermediate (Hardware Design)
- fabrics/NoCintermediate (Hardware Design)
- memory hierarchiesintermediate (Hardware Design)
- high performance design techniquesadvanced (Hardware Design)
- low power design techniquesadvanced (Hardware Design)
Required Qualifications
- Bachelor's degree (degree in Electrical Engineering, Computer Engineering, Computer Science, or related field)
- ASIC/SoC development (experience in Verilog/SystemVerilog, 5 years)
- SoC Integration (experience in Clocking, debug, fabrics/NoC, Security, low power methodologies)
Responsibilities
- Own microarchitecture, implementation and Integration of SoC Chassis and subsystems
- Perform Quality check flows like Lint, CDC, RDC, VCLP
- Drive design methodology, libraries, debug, code review in coordination with other IPs Design Verification (DV) teams and physical design teams
- Identify and drive Power, Performance and Area improvements for the domains owned
Benefits
- Equal Opportunity: Google is proud to be an equal opportunity and affirmative action employer
- Culture: Creating a culture of belonging
Documents
Application Instructions
Apply through Google Careers portal