Google | Bengaluru, Karnataka, India. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience. 1 years of experience with verification methodologies and languages (e.g., Universal Verification Methodology, SystemVerilog). Experience developing and maintaining verification testbenches, test cases, and test environments. Experience working on main interconnects, Direct Memory Access (DMA), controllers, power management, and capturing design specifications in a temporal assertion language (e.g., System Verilog Assertions (SVA) or Property Specification Language (PSL)). Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. In this role, you will perform formal verification of design properties of ASIC designs. You will collaborate with design and verification engineers to define properties that capture the design intent of a logic block and constraints on its input stimulus. You will also help define and improve design and verification methodologies that allow you to achieve formal verification closure. Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Locations
Bengaluru, Karnataka, India
Salary
Salary not disclosed
Estimated Salary Rangemedium confidence
15,000,000 - 35,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
Verification methodologies and languages (e.g., UVM, SystemVerilog)intermediate (Hardware Verification)
Developing and maintaining verification testbenches, test cases, and environmentsintermediate (Hardware Verification)
Main interconnects, DMA, controllers, power managementintermediate (Hardware Design)
Capturing design specifications in temporal assertion language (e.g., SVA, PSL)intermediate (Hardware Verification)
Bachelor's degree (degree in Electrical Engineering or Computer Science)
Experience with verification methodologies and languages (experience, 1 years)
Experience developing and maintaining verification testbenches (experience, 1 years)
Experience working on main interconnects, DMA, controllers, power management (experience, 1 years)
Master's degree or PhD (degree in Electrical Engineering or Computer Science)
Experience with formal verification tools (experience)
Experience with scripting languages (experience)
Knowledge of formal verification algorithms (experience)
Responsibilities
Plan the formal verification strategy and create the properties and constraints for digital design blocks.
Utilize formal property verification tools combined with formal verification closure techniques to verify properties.
Resolve difficult to verify properties.
Contribute improvements to methodologies to enhance formal verification results.
Architect and implement reusable formal verification components.
Benefits
Equal Opportunity: Google is proud to be an equal opportunity and affirmative action employer committed to building a workforce representative of the users we serve.
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