Principal Design Verification Engineer
Job Description
Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission. As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the AI Silicon Engineering team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for seasoned engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure. We are looking for a Principal Design Verification Engineer to join the team. #SCHIE
Locations
- Bangalore, Karnataka, India, Bangalore, Karnataka, India
- Hyderabad, Telangana, India, Hyderabad, Telangana, India
- Noida, Uttar Pradesh, India, Noida, Uttar Pradesh, India
Salary
Salary not disclosed
Required Qualifications
- Bachelor’s degree in Electronics Engineering, Computer Engineering, Computer Science, or related field (degree)
- 12+ years' design verification experience with complex IPs and subsystems delivery (degree)
- Full-cycle IP/SOC verification experience: from definition to silicon, including DV environment architecture, effort estimation, test planning, test development, debugging, and coverage signoff (degree)
- Strong knowledge of verification principles, testbenches, stimulus generation, and UVM or C++ environments (degree)
- Extensive experience debugging RTL (Verilog) designs and working in simulation/emulation environments (degree)
- Familiarity with writing assertions and formal verification. (degree)
- Knowledge of networking protocols, such as RDMA and Ethernet. (degree)
- Exposure to post-silicon bring-up or debug of SoCs. (degree)
- Experience with scripting languages, including Python or Perl. (degree)
- Demonstrated skills in communication, collaboration, and teamwork, with the ability to work effectively in diverse and inclusive teams. (degree)
- Interest in or hands-on experience with deploying AI solutions. (degree)
Responsibilities
- Lead design verification for complex IPs or subsystems.
- Work with architecture and design teams to meet all implementation goals.
- Create, review, and oversee test methodologies and execution.
- Build verification environments using constrained random stimulus and coverage metrics; run and debug simulations for quality.
- Drive and execute test plans for key features or products, setting and meeting coverage targets.
- Apply Agile practices such as code reviews and sprint planning.
- Improve verification efficiency through new methods, processes, or tools.
- Provide technical leadership via mentorship, teamwork, and example.
- Uphold Microsoft values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Results, Impact, Judgement, Diversity & Inclusion.
Travel Requirements
Up to 50% work from home
