WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: As a design engineer in our CAD and methodology team, you will be responsible for leading and optimizing the EDA environment for Project CAD team in the Adaptive & Embedded Computing Group (AECG). You will oversee the complete SCH-to-GDS flow, manage tool deployments, and drive methodology development across multiple semiconductor projects. This is an opportunity to shape the technical direction of critical IC design workflows and lead a team of skilled CAD engineers. You will advise on tools selection, and interface with various EDA tool vendors and foundries to run the EDA tools, PDKs and other files necessary for the Silicon Development Team to operate efficiently. You will be responsible for defining and creating a unified environment that sets the versions of the tools, PDK and design for every individual chip in development. Additionally, you will interact with the various Silicon development teams who will be requesting newer versions of the tools and raise trouble tickets with CAD vendors as needed. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Execute in CAD infrastructure team supporting multiple IC design projects Establish and maintain standardized design flows and methodologies Implement and support customized CAD flows for Fabric design groups Enable the team to meet design and development targets by working closely with external tool vendors Develop tools flows methodologies on digital back-end domains, sign-off flows for timing, power, EM/IR, DRC/LVS/DFM, etc. Improve engineering efficiency while improving design quality in IP release process Be single point contact for bugs and issues for custom and analog physical design team Build flow in TCL, Python to ensure quality and faster executions Understand different methodologies used across industry to adopt best practices Leverage and deploy AMD AI systems to design teams PREFERRED EXPERIENCE: Proficiency in TCL, Python, PERL, or other scripting languages Experience with PDKs and technology enablement Skilled in Spice and PVT simulation environments Hands-on expertise with Virtuoso-based custom layout tools and flows Familiarity with Calibre extraction flows and EM/IR analysis using Totem and Redhawk Working knowledge of SiliconSmart, PrimeTime, and Physical aspect of VLSI designs Strong written and verbal communication skills ACADEMIC CREDENTIALS: Bachelor's degree in Computer or Electrical Engineering, or equivalent; Master's degree preferred LOCATION: San Jose #LI-GW1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.