ASIC Design Engineer, Kuiper ASIC Design
Job Description
Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world.Key job responsibilitiesGate Level Simulation: Develop and maintain comprehensive gate-level simulation test plans for verifying ASIC functionality and timing. Analyze simulation results, identify and debug logic errors, and propose solutions. Work closely with design and verification engineers to validate fixes and ensure design closure.Facilitate seamless integration across Firmware, RTL, Platform Software, and Platform Drivers.Develop Debug tools: RTL Emulation, silicon bring-up, and functional validation.Export Control Requirement:Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.Key job responsibilities· Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and performance targets.· Define, configure and integration SoC Subsystems· Contribute to the SoC floor planning effort· Define and develop any necessary support logic· Configure, instantiate and integrate 3rd party IP blocks· Understand low power design & the impact of DFT on the blocks· Perform initial synthesis & timing analysis· Assist verification team in unit verification including test plan development· Assist with debug and bring-up
Locations
- United States, TX, Austin, Austin, TX, United States
Salary
Salary not disclosed
Estimated Salary Rangehigh confidence
150,000 - 220,000 USD / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- - 3+ years of non-internship professional software development experienceintermediate
- - 3+ years of programming with at least one software programming language experience -intermediate
- - 3+ years of leading design or architecture (design patterns, reliability and scaling) of new and existing systems experienceintermediate
- - 3+ years of digital design experience, preferably in SoC design and implementationintermediate
Required Qualifications
- - 3+ years of non-internship professional software development experience (experience, 3 years)
- - 3+ years of programming with at least one software programming language experience - (experience, 3 years)
- - 3+ years of leading design or architecture (design patterns, reliability and scaling) of new and existing systems experience (experience, 3 years)
- - 3+ years of digital design experience, preferably in SoC design and implementation (experience, 3 years)
Preferred Qualifications
- - 2+ years of full software development life cycle, including coding standards, code reviews, source control management, build processes, testing, and operations experience (experience, 2 years)
- - Master's degree in computer science or equivalent (degree in computer science or equivalent)
Responsibilities
- Gate Level Simulation: Develop and maintain comprehensive gate-level simulation test plans for verifying ASIC functionality and timing. Analyze simulation results, identify and debug logic errors, and propose solutions. Work closely with design and verification engineers to validate fixes and ensure design closure.
- Facilitate seamless integration across Firmware, RTL, Platform Software, and Platform Drivers.
- Develop Debug tools: RTL Emulation, silicon bring-up, and functional validation.
- Export Control Requirement:
- Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.
- Key job responsibilities
- · Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and performance targets.
- · Define, configure and integration SoC Subsystems
- · Contribute to the SoC floor planning effort
- · Define and develop any necessary support logic
- · Configure, instantiate and integrate 3rd party IP blocks
- · Understand low power design & the impact of DFT on the blocks
- · Perform initial synthesis & timing analysis
- · Assist verification team in unit verification including test plan development
- · Assist with debug and bring-up
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ASIC Design Engineer, Kuiper ASIC Design
Job Description
Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world.Key job responsibilitiesGate Level Simulation: Develop and maintain comprehensive gate-level simulation test plans for verifying ASIC functionality and timing. Analyze simulation results, identify and debug logic errors, and propose solutions. Work closely with design and verification engineers to validate fixes and ensure design closure.Facilitate seamless integration across Firmware, RTL, Platform Software, and Platform Drivers.Develop Debug tools: RTL Emulation, silicon bring-up, and functional validation.Export Control Requirement:Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.Key job responsibilities· Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and performance targets.· Define, configure and integration SoC Subsystems· Contribute to the SoC floor planning effort· Define and develop any necessary support logic· Configure, instantiate and integrate 3rd party IP blocks· Understand low power design & the impact of DFT on the blocks· Perform initial synthesis & timing analysis· Assist verification team in unit verification including test plan development· Assist with debug and bring-up
Locations
- United States, TX, Austin, Austin, TX, United States
Salary
Salary not disclosed
Estimated Salary Rangehigh confidence
150,000 - 220,000 USD / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- - 3+ years of non-internship professional software development experienceintermediate
- - 3+ years of programming with at least one software programming language experience -intermediate
- - 3+ years of leading design or architecture (design patterns, reliability and scaling) of new and existing systems experienceintermediate
- - 3+ years of digital design experience, preferably in SoC design and implementationintermediate
Required Qualifications
- - 3+ years of non-internship professional software development experience (experience, 3 years)
- - 3+ years of programming with at least one software programming language experience - (experience, 3 years)
- - 3+ years of leading design or architecture (design patterns, reliability and scaling) of new and existing systems experience (experience, 3 years)
- - 3+ years of digital design experience, preferably in SoC design and implementation (experience, 3 years)
Preferred Qualifications
- - 2+ years of full software development life cycle, including coding standards, code reviews, source control management, build processes, testing, and operations experience (experience, 2 years)
- - Master's degree in computer science or equivalent (degree in computer science or equivalent)
Responsibilities
- Gate Level Simulation: Develop and maintain comprehensive gate-level simulation test plans for verifying ASIC functionality and timing. Analyze simulation results, identify and debug logic errors, and propose solutions. Work closely with design and verification engineers to validate fixes and ensure design closure.
- Facilitate seamless integration across Firmware, RTL, Platform Software, and Platform Drivers.
- Develop Debug tools: RTL Emulation, silicon bring-up, and functional validation.
- Export Control Requirement:
- Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.
- Key job responsibilities
- · Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and performance targets.
- · Define, configure and integration SoC Subsystems
- · Contribute to the SoC floor planning effort
- · Define and develop any necessary support logic
- · Configure, instantiate and integrate 3rd party IP blocks
- · Understand low power design & the impact of DFT on the blocks
- · Perform initial synthesis & timing analysis
- · Assist verification team in unit verification including test plan development
- · Assist with debug and bring-up