Job Description

Locations

• United States, TX, Austin, Austin, TX, United States
• United States, CA, Cupertino, Cupertino, CA, United States

Salary

Skills Required

• - 8+ years of design verification experience using System Verilog and UVMintermediate

Required Qualifications

• - BS Degree or Higher in EE or CS or CE. (degree in higher in ee or cs or ce)
• - 8+ years of design verification experience using System Verilog and UVM (experience, 8 years)
• - 8+ YOE in testbench development including: stimulus, checkers, assertions and coverage (experience)

Preferred Qualifications

• - Experience verifying multiple levels of design including: custom blocks, IP blocks, sub-systems, and fullchip SOC system testing. (experience)
• - Experience using multiple verification platforms. (experience)
• - Experience with C/C++ and Object-Oriented Programming. (experience)
• - Experience with scripting languages, for e.g. Python. (experience)
• - Experience with AMBA protocols, for e.g. AHB/APB/AXI (experience)
• - Experience with interconnect protocols, for e.g. PCIe and UCIe (experience)
• - Experience with memory sub-systems, including cache coherency and synchronization techniques (experience)
• - Experience with verifying complex CPU, GPU, or ML accelerator designs (experience)
• Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company’s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. (experience)
• Our compensation reflects the cost of labor across several US geographic markets. The base pay for this position ranges from $143,300/year in our lowest geographic market up to $247,600/year in our highest geographic market. Pay is based on a number of factors including market location and may vary depending on job-related knowledge, skills, and experience. Amazon is a total compensation company. Dependent on the position offered, equity, sign-on payments, and other forms of compensation may be provided as part of a total compensation package, in addition to a full range of medical, financial, and/or other benefits. For more information, please visit https://www.aboutamazon.com/workplace/employee-benefits. This position will remain posted until filled. Applicants should apply via our internal or external career site. (experience)

Responsibilities

• - verify custom chip designs at the SOC level
• - integrate 3rd party IPs and VIPs into the SOC testbench
• - create comprehensive testplans, write robust random testcases, and execute coverage plans
• - maintain autosmoke and regression infrastructure
• - dive deep into bugs and triages
• - mentor junior engineers

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