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Principal Embedded Software Architect Careers at Analog Devices in Valencia, Cortes Valencianas, Spain | Apply Now

Analog Devices

Principal Embedded Software Architect Careers at Analog Devices in Valencia, Cortes Valencianas, Spain | Apply Now

full-timePosted: Feb 5, 2026

Job Description

Principal Embedded Software Architect Careers at Analog Devices in Valencia, Cortes Valencianas, Spain

Overview: Leading HW/SW Co-Design Innovation at Analog Devices

Analog Devices stands at the forefront of semiconductor innovation, bridging the physical and digital worlds to power breakthroughs at the Intelligent Edge. With over $9 billion in FY24 revenue and 24,000 employees worldwide, we're transforming digitized factories, mobility solutions, digital healthcare, climate initiatives, and global connectivity. In Valencia, Cortes Valencianas, Spain, our Principal Embedded Software Architect role represents a pivotal opportunity to shape the future of HW/SW co-design.

This isn't just a coding position—it's architectural leadership. You'll pioneer the "Architectural Single Source of Truth," creating standardized frameworks that synchronize silicon design with software development. Imagine enabling SoC architects, verification teams, and software engineers to collaborate seamlessly months before silicon tape-out. Your work will shorten development cycles, detect errors early, and integrate cutting-edge LLM agents into design workflows.

Valencia's thriving tech ecosystem, combined with Analog Devices' global resources, positions you perfectly to drive these innovations. From the sun-drenched Mediterranean coast to world-class engineering facilities, this role offers technical challenge with lifestyle rewards.

A Day in the Life of a Principal Embedded Software Architect in Valencia

Your morning begins with espresso in Valencia's historic center, a short commute to our state-of-the-art facility. By 9:30 AM, you're diving into the architecture database, reviewing overnight CI/CD pipeline results from your latest Python API enhancements. A Slack ping from the SoC team flags a memory map change—you trigger automated propagation to virtual platforms, verifying LLM agents correctly interpret the update in under 30 minutes.

Mid-morning standup with cross-functional teams: IP architects share power domain refinements; you demonstrate how your tooling extracts this for DV teams. Lunch features paella with colleagues, discussing Cadence simulator integrations. Afternoon brings deep work—prototyping MCP servers for LLM-driven register validation. A 3 PM sync with Boston HQ reviews agentic workflow progress, your standardized data model earning praise for enabling global reuse.

Evenings wrap with code reviews or mentoring junior engineers on Devicetree best practices. By 6 PM, you're exploring Valencia's Turia Gardens, balancing intense technical work with Mediterranean lifestyle. This rhythm—innovation by day, culture by night—defines excellence at Analog Devices.

Why Valencia, Cortes Valencianas, Spain?

Valencia blends world-class engineering with unbeatable quality of life. Spain's third-largest city boasts 800,000 residents, pristine beaches, and a booming tech sector. Our Cortes Valencianas location offers proximity to Universitat Politècnica de València's elite engineering programs, ensuring talent pipelines and collaboration opportunities.

Cultural riches abound: the City of Arts and Sciences' futuristic architecture inspires innovation; Fallas Festival's creative energy fuels problem-solving. Mediterranean climate means 300 sunny days yearly—perfect for beach volleyball after debugging sessions. Cost of living remains 30% below Madrid/Barcelona, stretching salaries further. High-speed rail connects to Europe; Valencia Airport serves global hubs.

Spain's tech incentives, including R&D tax credits up to 42%, amplify Analog Devices' innovation. English widely spoken in tech circles; Spanish fluency accelerates local partnerships. From paella to paella hacks (your embedded optimization stories over dinner), Valencia transforms careers into legacies.

Career Growth Opportunities

Analog Devices invests heavily in principal architects. Expect 15% annual training budgets for conferences like Embedded World, DesignCon. Internal mobility spans 24,000 roles across 50+ countries. Many principals advance to Distinguished Architect or VP Engineering within 3-5 years.

Lead cross-site initiatives: mentor Singapore verification teams on your tooling; present at ESC conferences. Publish papers on LLM-SoC integration—ADI supports IEEE memberships. Equity grants vest over four years, aligning with company growth (ADI stock +200% past five years). Spain's indefinite contracts provide stability rare in tech.

Technical ladders reward impact: your single-source framework could standardize across $2B SoC portfolio, earning promotion to Fellow-level impact.

Rewards and Compensation Excellence

Base salaries €90,000-€135,000+ (USD $120K-$180K equivalent), 20% performance bonuses, RSUs. 25 vacation days, 14 paid holidays, flexible hours. Private health coverage (100% premium paid), dental/vision. Pension matching 8.5%, life/disability insurance.

€2,000 annual training budget, language classes, wellness stipends. Relocation package: flights, temporary housing, settling-in allowance. 16 weeks parental leave. Employee stock purchase at 15% discount. On-site gym, bike scheme, fruit Fridays. 10% travel budget explores ADI's Limerick, Wilmington sites.

Analog Devices Culture in Spain

ADI Spain emphasizes collaboration without compromise. Flat hierarchies empower principals to drive decisions. Weekly tech talks, hackathons foster innovation. Diversity initiatives: 40% women in engineering roles, LGBTQ+ inclusion. Sustainability focus—your co-design work reduces silicon respins, cutting carbon footprint.

Team-building blends Valencia flair: beach volleyball, tapas crawls, volunteer days at Oceanogràfic. Global town halls with CEO Vincent Roche ensure alignment. "Ahead of What's Possible" isn't slogan—it's daily reality, from LLM prototypes to production SoCs.

Apply Now: Join the Future of Embedded Architecture

Ready to architect the next era of HW/SW co-design? Submit your CV highlighting SoC experience, Python tooling, virtual platform work. Include GitHub samples, publications. Interviews: technical deep-dive (C++ embedded, SystemVerilog basics), architecture presentation, team fit. Offers within 2 weeks.

Analog Devices is EEO employer. Export compliance may apply. Travel 10%. 1st shift. Apply Here

Frequently Asked Questions

Locations

  • Valencia, Cortes Valencianas, Spain

Salary

120,000 - 180,000 USD / yearly

Estimated Salary Rangehigh confidence

120,000 - 180,000 USD / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • Embedded Software Developmentintermediate
  • C/C++ Programmingintermediate
  • Assembly Languageintermediate
  • Low-Level Driver Developmentintermediate
  • Firmware Developmentintermediate
  • SoC Architectureintermediate
  • Boot Processesintermediate
  • Memory Managementintermediate
  • Peripherals (I2C, SPI, UART, DMA)intermediate
  • Interrupt Handlingintermediate
  • Python Scriptingintermediate
  • Perl Scriptingintermediate
  • Tcl Scriptingintermediate
  • Bash Scriptingintermediate
  • Git Version Controlintermediate
  • Perforce Version Controlintermediate
  • Hardware Description Languages (Verilog, SystemVerilog)intermediate
  • Linux BSP Developmentintermediate
  • Devicetreeintermediate
  • Kconfigintermediate
  • API Developmentintermediate
  • Tooling Frameworksintermediate
  • LLM Integrationintermediate
  • Virtual Platformsintermediate
  • HW/SW Co-Designintermediate
  • Automation Toolingintermediate

Required Qualifications

  • Bachelor’s or Master’s degree in Computer Science, Electrical Engineering, or related field (experience)
  • 10+ years hands-on experience in embedded software development (experience)
  • Deep understanding of embedded systems architecture (experience)
  • Familiarity with end-to-end SoC design process from architecture to tape-out (experience)
  • Experience with C/C++, assembly, low-level drivers/firmware for complex SoCs (experience)
  • Strong knowledge of boot processes and memory management (experience)
  • Expertise in peripherals including I2C, SPI, UART, DMA (experience)
  • Proficient in interrupt handling mechanisms (experience)
  • Experience collaborating with hardware teams (experience)
  • Basic understanding of Verilog and SystemVerilog (experience)
  • Advanced scripting skills in Python, Perl, Tcl, Bash (experience)
  • Proficiency with Git and Perforce version control (experience)
  • Demonstrated autonomy in planning and leading projects (experience)
  • Experience defining IP and SoC-level hardware-software interfaces (experience)
  • Linux BSP development experience with Devicetree and Kconfig (experience)
  • Hands-on with SoC design tools from Cadence, Synopsys, Mentor Graphics (experience)

Responsibilities

  • Architect robust APIs for IP/SoC metadata management including memory/register maps
  • Implement high-performance Python-based tooling for design data capture and extraction
  • Collaborate with domain experts to capture and provide programmatic access to design data
  • Integrate single source of truth with LLM Agents using Model Context Protocol servers
  • Lead transition to agentic workflows enabling LLMs to query and manipulate SoC data
  • Develop APIs bridging LLMs and design data to resolve bottlenecks
  • Collaborate with IP/SoC architects, ASIC design, DV, SW teams on virtual platforms
  • Ensure design data changes propagate to virtual platforms within hours
  • Proactively identify needs to facilitate virtual platform adoption across projects
  • Maintain generalist view of cross-project and cross-discipline tooling needs
  • Champion HW/SW co-design methodologies throughout development lifecycle
  • Standardize encoding and access to architectural design decisions
  • Enable shift-left development starting months before physical silicon
  • Shorten iteration loops based on design data changes
  • Build robust tooling ecosystem on standardized design data
  • Ensure early-stage error detection as IP/SoC designs evolve

Benefits

  • general: Competitive base salary with performance bonuses
  • general: Comprehensive health insurance coverage
  • general: Dental and vision plans
  • general: 401(k) matching contributions
  • general: Stock purchase plans
  • general: Paid time off and holidays
  • general: Flexible working hours
  • general: Remote work options where applicable
  • general: Professional development budget
  • general: Tuition reimbursement programs
  • general: Employee assistance programs
  • general: Wellness and fitness reimbursements
  • general: Parental leave policies
  • general: Relocation assistance for qualifying positions
  • general: Company-sponsored retirement plans
  • general: Volunteer time off programs
  • general: On-site fitness facilities where available
  • general: Employee discount programs

Target Your Resume for "Principal Embedded Software Architect Careers at Analog Devices in Valencia, Cortes Valencianas, Spain | Apply Now" , Analog Devices

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Tags & Categories

Principal Embedded Software ArchitectAnalog Devices careersHW/SW co-design jobsSoC architecture SpainEmbedded firmware ValenciaVirtual platforms engineeringLLM integration SoCPython tooling architectCortes Valencianas tech jobsSemiconductor software architectIP metadata managementLinux BSP developmentDevicetree expertSystemVerilog embeddedGit Perforce engineerValencia engineering careersAnalog Devices SpainSingle source of truth architectureAgentic workflows SoCMCP servers LLMEarly silicon developmentShift-left engineeringEmbedded SoftwareSoftware ArchitectureHardware Software Co-DesignSemiconductorSoC DesignFirmware Development

Answer 10 quick questions to check your fit for Principal Embedded Software Architect Careers at Analog Devices in Valencia, Cortes Valencianas, Spain | Apply Now @ Analog Devices.

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Analog Devices logo

Principal Embedded Software Architect Careers at Analog Devices in Valencia, Cortes Valencianas, Spain | Apply Now

Analog Devices

Principal Embedded Software Architect Careers at Analog Devices in Valencia, Cortes Valencianas, Spain | Apply Now

full-timePosted: Feb 5, 2026

Job Description

Principal Embedded Software Architect Careers at Analog Devices in Valencia, Cortes Valencianas, Spain

Overview: Leading HW/SW Co-Design Innovation at Analog Devices

Analog Devices stands at the forefront of semiconductor innovation, bridging the physical and digital worlds to power breakthroughs at the Intelligent Edge. With over $9 billion in FY24 revenue and 24,000 employees worldwide, we're transforming digitized factories, mobility solutions, digital healthcare, climate initiatives, and global connectivity. In Valencia, Cortes Valencianas, Spain, our Principal Embedded Software Architect role represents a pivotal opportunity to shape the future of HW/SW co-design.

This isn't just a coding position—it's architectural leadership. You'll pioneer the "Architectural Single Source of Truth," creating standardized frameworks that synchronize silicon design with software development. Imagine enabling SoC architects, verification teams, and software engineers to collaborate seamlessly months before silicon tape-out. Your work will shorten development cycles, detect errors early, and integrate cutting-edge LLM agents into design workflows.

Valencia's thriving tech ecosystem, combined with Analog Devices' global resources, positions you perfectly to drive these innovations. From the sun-drenched Mediterranean coast to world-class engineering facilities, this role offers technical challenge with lifestyle rewards.

A Day in the Life of a Principal Embedded Software Architect in Valencia

Your morning begins with espresso in Valencia's historic center, a short commute to our state-of-the-art facility. By 9:30 AM, you're diving into the architecture database, reviewing overnight CI/CD pipeline results from your latest Python API enhancements. A Slack ping from the SoC team flags a memory map change—you trigger automated propagation to virtual platforms, verifying LLM agents correctly interpret the update in under 30 minutes.

Mid-morning standup with cross-functional teams: IP architects share power domain refinements; you demonstrate how your tooling extracts this for DV teams. Lunch features paella with colleagues, discussing Cadence simulator integrations. Afternoon brings deep work—prototyping MCP servers for LLM-driven register validation. A 3 PM sync with Boston HQ reviews agentic workflow progress, your standardized data model earning praise for enabling global reuse.

Evenings wrap with code reviews or mentoring junior engineers on Devicetree best practices. By 6 PM, you're exploring Valencia's Turia Gardens, balancing intense technical work with Mediterranean lifestyle. This rhythm—innovation by day, culture by night—defines excellence at Analog Devices.

Why Valencia, Cortes Valencianas, Spain?

Valencia blends world-class engineering with unbeatable quality of life. Spain's third-largest city boasts 800,000 residents, pristine beaches, and a booming tech sector. Our Cortes Valencianas location offers proximity to Universitat Politècnica de València's elite engineering programs, ensuring talent pipelines and collaboration opportunities.

Cultural riches abound: the City of Arts and Sciences' futuristic architecture inspires innovation; Fallas Festival's creative energy fuels problem-solving. Mediterranean climate means 300 sunny days yearly—perfect for beach volleyball after debugging sessions. Cost of living remains 30% below Madrid/Barcelona, stretching salaries further. High-speed rail connects to Europe; Valencia Airport serves global hubs.

Spain's tech incentives, including R&D tax credits up to 42%, amplify Analog Devices' innovation. English widely spoken in tech circles; Spanish fluency accelerates local partnerships. From paella to paella hacks (your embedded optimization stories over dinner), Valencia transforms careers into legacies.

Career Growth Opportunities

Analog Devices invests heavily in principal architects. Expect 15% annual training budgets for conferences like Embedded World, DesignCon. Internal mobility spans 24,000 roles across 50+ countries. Many principals advance to Distinguished Architect or VP Engineering within 3-5 years.

Lead cross-site initiatives: mentor Singapore verification teams on your tooling; present at ESC conferences. Publish papers on LLM-SoC integration—ADI supports IEEE memberships. Equity grants vest over four years, aligning with company growth (ADI stock +200% past five years). Spain's indefinite contracts provide stability rare in tech.

Technical ladders reward impact: your single-source framework could standardize across $2B SoC portfolio, earning promotion to Fellow-level impact.

Rewards and Compensation Excellence

Base salaries €90,000-€135,000+ (USD $120K-$180K equivalent), 20% performance bonuses, RSUs. 25 vacation days, 14 paid holidays, flexible hours. Private health coverage (100% premium paid), dental/vision. Pension matching 8.5%, life/disability insurance.

€2,000 annual training budget, language classes, wellness stipends. Relocation package: flights, temporary housing, settling-in allowance. 16 weeks parental leave. Employee stock purchase at 15% discount. On-site gym, bike scheme, fruit Fridays. 10% travel budget explores ADI's Limerick, Wilmington sites.

Analog Devices Culture in Spain

ADI Spain emphasizes collaboration without compromise. Flat hierarchies empower principals to drive decisions. Weekly tech talks, hackathons foster innovation. Diversity initiatives: 40% women in engineering roles, LGBTQ+ inclusion. Sustainability focus—your co-design work reduces silicon respins, cutting carbon footprint.

Team-building blends Valencia flair: beach volleyball, tapas crawls, volunteer days at Oceanogràfic. Global town halls with CEO Vincent Roche ensure alignment. "Ahead of What's Possible" isn't slogan—it's daily reality, from LLM prototypes to production SoCs.

Apply Now: Join the Future of Embedded Architecture

Ready to architect the next era of HW/SW co-design? Submit your CV highlighting SoC experience, Python tooling, virtual platform work. Include GitHub samples, publications. Interviews: technical deep-dive (C++ embedded, SystemVerilog basics), architecture presentation, team fit. Offers within 2 weeks.

Analog Devices is EEO employer. Export compliance may apply. Travel 10%. 1st shift. Apply Here

Frequently Asked Questions

Locations

  • Valencia, Cortes Valencianas, Spain

Salary

120,000 - 180,000 USD / yearly

Estimated Salary Rangehigh confidence

120,000 - 180,000 USD / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • Embedded Software Developmentintermediate
  • C/C++ Programmingintermediate
  • Assembly Languageintermediate
  • Low-Level Driver Developmentintermediate
  • Firmware Developmentintermediate
  • SoC Architectureintermediate
  • Boot Processesintermediate
  • Memory Managementintermediate
  • Peripherals (I2C, SPI, UART, DMA)intermediate
  • Interrupt Handlingintermediate
  • Python Scriptingintermediate
  • Perl Scriptingintermediate
  • Tcl Scriptingintermediate
  • Bash Scriptingintermediate
  • Git Version Controlintermediate
  • Perforce Version Controlintermediate
  • Hardware Description Languages (Verilog, SystemVerilog)intermediate
  • Linux BSP Developmentintermediate
  • Devicetreeintermediate
  • Kconfigintermediate
  • API Developmentintermediate
  • Tooling Frameworksintermediate
  • LLM Integrationintermediate
  • Virtual Platformsintermediate
  • HW/SW Co-Designintermediate
  • Automation Toolingintermediate

Required Qualifications

  • Bachelor’s or Master’s degree in Computer Science, Electrical Engineering, or related field (experience)
  • 10+ years hands-on experience in embedded software development (experience)
  • Deep understanding of embedded systems architecture (experience)
  • Familiarity with end-to-end SoC design process from architecture to tape-out (experience)
  • Experience with C/C++, assembly, low-level drivers/firmware for complex SoCs (experience)
  • Strong knowledge of boot processes and memory management (experience)
  • Expertise in peripherals including I2C, SPI, UART, DMA (experience)
  • Proficient in interrupt handling mechanisms (experience)
  • Experience collaborating with hardware teams (experience)
  • Basic understanding of Verilog and SystemVerilog (experience)
  • Advanced scripting skills in Python, Perl, Tcl, Bash (experience)
  • Proficiency with Git and Perforce version control (experience)
  • Demonstrated autonomy in planning and leading projects (experience)
  • Experience defining IP and SoC-level hardware-software interfaces (experience)
  • Linux BSP development experience with Devicetree and Kconfig (experience)
  • Hands-on with SoC design tools from Cadence, Synopsys, Mentor Graphics (experience)

Responsibilities

  • Architect robust APIs for IP/SoC metadata management including memory/register maps
  • Implement high-performance Python-based tooling for design data capture and extraction
  • Collaborate with domain experts to capture and provide programmatic access to design data
  • Integrate single source of truth with LLM Agents using Model Context Protocol servers
  • Lead transition to agentic workflows enabling LLMs to query and manipulate SoC data
  • Develop APIs bridging LLMs and design data to resolve bottlenecks
  • Collaborate with IP/SoC architects, ASIC design, DV, SW teams on virtual platforms
  • Ensure design data changes propagate to virtual platforms within hours
  • Proactively identify needs to facilitate virtual platform adoption across projects
  • Maintain generalist view of cross-project and cross-discipline tooling needs
  • Champion HW/SW co-design methodologies throughout development lifecycle
  • Standardize encoding and access to architectural design decisions
  • Enable shift-left development starting months before physical silicon
  • Shorten iteration loops based on design data changes
  • Build robust tooling ecosystem on standardized design data
  • Ensure early-stage error detection as IP/SoC designs evolve

Benefits

  • general: Competitive base salary with performance bonuses
  • general: Comprehensive health insurance coverage
  • general: Dental and vision plans
  • general: 401(k) matching contributions
  • general: Stock purchase plans
  • general: Paid time off and holidays
  • general: Flexible working hours
  • general: Remote work options where applicable
  • general: Professional development budget
  • general: Tuition reimbursement programs
  • general: Employee assistance programs
  • general: Wellness and fitness reimbursements
  • general: Parental leave policies
  • general: Relocation assistance for qualifying positions
  • general: Company-sponsored retirement plans
  • general: Volunteer time off programs
  • general: On-site fitness facilities where available
  • general: Employee discount programs

Target Your Resume for "Principal Embedded Software Architect Careers at Analog Devices in Valencia, Cortes Valencianas, Spain | Apply Now" , Analog Devices

Get personalized recommendations to optimize your resume specifically for Principal Embedded Software Architect Careers at Analog Devices in Valencia, Cortes Valencianas, Spain | Apply Now. Takes only 15 seconds!

AI-powered keyword optimization
Skills matching & gap analysis
Experience alignment suggestions

Check Your ATS Score for "Principal Embedded Software Architect Careers at Analog Devices in Valencia, Cortes Valencianas, Spain | Apply Now" , Analog Devices

Find out how well your resume matches this job's requirements. Get comprehensive analysis including ATS compatibility, keyword matching, skill gaps, and personalized recommendations.

ATS compatibility check
Keyword optimization analysis
Skill matching & gap identification
Format & readability score

Tags & Categories

Principal Embedded Software ArchitectAnalog Devices careersHW/SW co-design jobsSoC architecture SpainEmbedded firmware ValenciaVirtual platforms engineeringLLM integration SoCPython tooling architectCortes Valencianas tech jobsSemiconductor software architectIP metadata managementLinux BSP developmentDevicetree expertSystemVerilog embeddedGit Perforce engineerValencia engineering careersAnalog Devices SpainSingle source of truth architectureAgentic workflows SoCMCP servers LLMEarly silicon developmentShift-left engineeringEmbedded SoftwareSoftware ArchitectureHardware Software Co-DesignSemiconductorSoC DesignFirmware Development

Answer 10 quick questions to check your fit for Principal Embedded Software Architect Careers at Analog Devices in Valencia, Cortes Valencianas, Spain | Apply Now @ Analog Devices.

Quiz Challenge
10 Questions
~2 Minutes
Instant Score

Related Books and Jobs

No related jobs found at the moment.