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Senior Physical Design Engineer Careers at Analog Devices in Bangalore, India | Apply Now

Analog Devices

Senior Physical Design Engineer Careers at Analog Devices in Bangalore, India | Apply Now

full-timePosted: Jan 27, 2026

Job Description

Senior Physical Design Engineer at Analog Devices in Bangalore, India

Analog Devices stands at the forefront of semiconductor innovation, bridging the physical and digital realms to power the Intelligent Edge. With over $9 billion in FY24 revenue and a global workforce of 24,000, we drive breakthroughs in digitized factories, mobility, digital healthcare, climate solutions, and seamless connectivity. In Bangalore, India, our Aveda Meta campus pulses with cutting-edge ASIC and SoC development, where Senior Physical Design Engineers are pivotal in transforming complex designs into manufacturable silicon realities.

This role demands expertise in advanced nodes like 16nm, 7nm, and 5nm, leading floorplanning, place-and-route, timing closure, and verification. You'll own full-chip implementations, automate flows, and mentor teams, embodying ADI's values of Agility, Impact, Leadership, and Innovation. Join us to shape the future of edge computing in one of India's premier tech ecosystems.

A Day in the Life of a Senior Physical Design Engineer in Bangalore

Imagine starting your morning at Analog Devices' state-of-the-art Aveda Meta facility in Bangalore, Karnataka, India. You sip filter coffee while reviewing overnight STA reports from the cloud-based farm. By 9:30 AM, you're in a stand-up with RTL designers discussing macro placement trade-offs for a 7nm SoC targeting automotive radar applications.

Mid-morning dives into Cadence Innovus, optimizing power grid density to slash IR drop by 15% without inflating area. Lunch at the vibrant cafeteria sparks ideas with verification engineers over Kerala fish curry. Afternoon brings hierarchical PNR automation scripting in Python, slashing block-level turnaround from days to hours. You resolve a tricky DRC with the foundry partner via WebEx, then mentor a junior on clock tree quality metrics.

Evenings wrap with cross-functional reviews, ensuring PPA targets align for tapeout. With 10% travel—perhaps to our Hyderabad site or customer meets—you thrive in this dynamic rhythm, contributing to chips that enable smarter factories and sustainable energy grids. This is physical design at ADI: high-stakes, collaborative, and profoundly impactful.

Why Bangalore, India for Your Engineering Career?

Bangalore, often called India's Silicon Valley, is a thriving metropolis in Karnataka where technology converges with innovation. Home to 13 million people, it boasts a perfect climate, world-class infrastructure, and a startup ecosystem rivaling Tel Aviv. Analog Devices' Aveda Meta campus sits in this epicenter, surrounded by giants like Infosys, Wipro, and global R&D hubs.

Why choose Bangalore? Unparalleled talent density—over 1.5 million IT professionals—fuels collaboration. The city's 300+ sunny days support outdoor pursuits, from Nandi Hills treks to Cubbon Park runs. Vibrant neighborhoods like Indiranagar offer farm-to-table dining, craft brews, and live music. UB City mall blends luxury shopping with cultural festivals like Bangalore Literature Fest.

For engineers, Electronic City and Whitefield host ADI's advanced labs, mere minutes from Kempegowda International Airport for global travel. Top universities like IISc produce cutting-edge talent, while accelerators like NSRCEL nurture ideas. Low living costs (30-50% below San Francisco) paired with high salaries yield exceptional quality of life. Public transport innovations like metro expansions and ride-sharing make commuting seamless. Bangalore isn't just a job location—it's a launchpad for semiconductor pioneers at Analog Devices.

Career Growth and Development at Analog Devices

At ADI, growth is engineered into your trajectory. Our Career Development Framework emphasizes Expertise, Autonomy & Scope, and Business Impact. As a Senior Physical Design Engineer, you'll advance from block ownership to chip leadership, then architecture influence. Internal mobility spans 24,000 global roles across Massachusetts, Ireland, Thailand, California, and beyond.

Invest in yourself with unlimited LinkedIn Learning, ADI University courses, and conference reimbursements (DAC, ISSCC). Mentorship programs pair you with directors; tech talks feature Nobel laureates. Certifications in Synopsys ICC2 or Siemens Calibre? Fully funded. High performers access LEADERSHIP tracks, with 70% promotions from within. In Bangalore, lead India-wide initiatives or transfer to Limerick, Ireland for EU projects. Your growth mirrors our innovation—Ahead of What's Possible™.

Rewards and Compensation Excellence

ADI rewards impact generously. Base salaries for seniors in Bangalore reflect global benchmarks, augmented by performance bonuses (15-25%), RSUs, and ESPP discounts. Comprehensive benefits include family health coverage, term life insurance, and gratuity. Enjoy 25+ paid leaves, sabbaticals post-5 years, and flexible hours.

Wellness shines with gym memberships, annual health checks, and EAP counseling. Parents receive 6-month maternity/paternity leave. Financial perks: PF matching, NPS contributions, and education allowances for kids. Relocation packages ease moves within India. Social impact via ADI Foundation volunteering earns paid time. In Bangalore's cost-effective landscape, your package stretches far—fueling homes in Koramangala or adventures to Coorg. Excellence demands premium rewards; ADI delivers.

Thriving Culture at Analog Devices Bangalore

ADI's culture pulses with Agility, Impact, Leadership, Innovation. In Bangalore, diverse teams from Tamil Nadu, Kerala, Karnataka blend perspectives on dosas and design. Hybrid models balance collaboration (team rooms with 8K displays) and focus. ERGs for women engineers, LGBTQ+, and veterans foster belonging.

Innovation Labs host hackathons yielding patents; Diwali sangeet and Holi parties build bonds. Leadership walks the talk—VP office hours welcome ideas. Recognition via monthly spotlights and global IMPACT awards. Sustainability drives our net-zero goals, with campus solar and e-waste drives. Equal opportunity is core: no bias on gender, caste, or background. In Aveda Meta's modern halls, you'll find purpose, camaraderie, and tools to excel. This is ADI culture—where engineers become legends.

Apply Now for Senior Physical Design Engineer

Ready to own the physical realm of next-gen semiconductors? Submit your resume highlighting 5+ years in advanced nodes, Innovus flows, and automation scripts. Include GitHub links or patent portfolios. Our Bangalore team reviews weekly; top candidates interview virtually then onsite. Expect technical deep-dives, behavioral scenarios, and culture fit chats. U.S. export compliance may apply for non-citizens.

Analog Devices is EEO employer. Join 24,000 innovators Ahead of What's Possible™. Apply Today.

Frequently Asked Questions

Locations

  • Bangalore, Karnataka, India

Salary

Estimated Salary Rangehigh confidence

120,000 - 180,000 USD / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • ASIC Physical Designintermediate
  • Floorplanning and Placementintermediate
  • Place-and-Route (PNR)intermediate
  • Static Timing Analysis (STA)intermediate
  • Clock Tree Synthesisintermediate
  • Physical Verification (DRC/LVS/ERC)intermediate
  • Cadence Innovusintermediate
  • Tcl Scriptingintermediate
  • Perl Automationintermediate
  • Python Scriptingintermediate
  • Low Power Design (UPF/CPF)intermediate
  • Multi-Voltage Domainsintermediate
  • Power Grid Designintermediate
  • Congestion Analysisintermediate
  • Timing Closureintermediate
  • Hierarchical Designintermediate
  • ESD/IR/EM Analysisintermediate
  • Advanced Nodes (16nm/7nm/5nm)intermediate
  • SoC Integrationintermediate
  • Mentoring Engineersintermediate
  • Cross-Functional Collaborationintermediate
  • EDA Tools Proficiencyintermediate
  • Automation Flowsintermediate
  • Sign-Off Methodologiesintermediate

Required Qualifications

  • Bachelor’s or Master’s in Electrical/Electronics Engineering (experience)
  • 5+ years in advanced ASIC/SoC physical design (experience)
  • Experience at 16nm and below nodes (experience)
  • Proficiency in floorplanning and PNR (experience)
  • Strong STA skills across PVT corners (experience)
  • Hands-on with Cadence Innovus (experience)
  • Physical verification expertise (DRC/LVS/ERC) (experience)
  • Scripting in Tcl, Perl, Python (experience)
  • Understanding of fabrication limits (experience)
  • ESD/IR/EM analysis knowledge (experience)
  • Hierarchical design experience (experience)
  • Low power methodologies (UPF/CPF) (experience)
  • Cross-functional collaboration skills (experience)
  • Mentoring junior engineers (experience)
  • Agile adaptation to business needs (experience)
  • Clear communication abilities (experience)

Responsibilities

  • Own end-to-end physical implementation for IP blocks/full-chips
  • Develop optimized floorplans including macro placement
  • Design IO rings and power grids
  • Perform congestion, area, timing analysis
  • Execute place-and-route using Cadence Innovus
  • Implement clock tree synthesis
  • Drive timing closure across PVT corners
  • Conduct detailed STA and sign-off
  • Resolve physical verification issues (DRC/LVS/ERC)
  • Partner with process/CAD/foundry teams
  • Automate design flows (hierarchical PNR, IO automation)
  • Enhance continuous flow improvements
  • Collaborate with RTL, DFT, verification teams
  • Meet PPA targets and milestones
  • Mentor and coach junior engineers
  • Document methodologies and best practices
  • Demonstrate ADI values: Agility, Impact, Leadership, Innovation

Benefits

  • general: Competitive salary and performance bonuses
  • general: Comprehensive health insurance coverage
  • general: Retirement savings plans with company match
  • general: Stock purchase and equity programs
  • general: Paid time off and flexible holidays
  • general: Parental leave and family support
  • general: Professional development tuition reimbursement
  • general: On-site fitness centers and wellness programs
  • general: Employee stock ownership plans
  • general: Relocation assistance for new hires
  • general: Hybrid work flexibility where applicable
  • general: Mental health and counseling services
  • general: Volunteer time off and charitable matching
  • general: Learning and development platforms
  • general: Global career mobility opportunities
  • general: Tech talks and innovation workshops
  • general: Cafeteria subsidies and meal programs

Target Your Resume for "Senior Physical Design Engineer Careers at Analog Devices in Bangalore, India | Apply Now" , Analog Devices

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Tags & Categories

Senior Physical Design EngineerAnalog Devices careersASIC physical design jobsSoC floorplanning BangaloreCadence Innovus jobs IndiaSTA timing closureAdvanced node 7nm 5nmPhysical verification DRC LVSSemiconductor jobs BangaloreAnalog Devices BangaloreAveda Meta campusPNR automation scriptingLow power UPF CPFElectronics engineering jobsChip design careers IndiaHierarchical design SoCMentor junior engineersTech jobs KarnatakaGlobal semiconductor leaderEdge computing innovationADI physical designTapeout signoff expertEngineeringSemiconductorsASIC DesignPhysical DesignHardware

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Analog Devices logo

Senior Physical Design Engineer Careers at Analog Devices in Bangalore, India | Apply Now

Analog Devices

Senior Physical Design Engineer Careers at Analog Devices in Bangalore, India | Apply Now

full-timePosted: Jan 27, 2026

Job Description

Senior Physical Design Engineer at Analog Devices in Bangalore, India

Analog Devices stands at the forefront of semiconductor innovation, bridging the physical and digital realms to power the Intelligent Edge. With over $9 billion in FY24 revenue and a global workforce of 24,000, we drive breakthroughs in digitized factories, mobility, digital healthcare, climate solutions, and seamless connectivity. In Bangalore, India, our Aveda Meta campus pulses with cutting-edge ASIC and SoC development, where Senior Physical Design Engineers are pivotal in transforming complex designs into manufacturable silicon realities.

This role demands expertise in advanced nodes like 16nm, 7nm, and 5nm, leading floorplanning, place-and-route, timing closure, and verification. You'll own full-chip implementations, automate flows, and mentor teams, embodying ADI's values of Agility, Impact, Leadership, and Innovation. Join us to shape the future of edge computing in one of India's premier tech ecosystems.

A Day in the Life of a Senior Physical Design Engineer in Bangalore

Imagine starting your morning at Analog Devices' state-of-the-art Aveda Meta facility in Bangalore, Karnataka, India. You sip filter coffee while reviewing overnight STA reports from the cloud-based farm. By 9:30 AM, you're in a stand-up with RTL designers discussing macro placement trade-offs for a 7nm SoC targeting automotive radar applications.

Mid-morning dives into Cadence Innovus, optimizing power grid density to slash IR drop by 15% without inflating area. Lunch at the vibrant cafeteria sparks ideas with verification engineers over Kerala fish curry. Afternoon brings hierarchical PNR automation scripting in Python, slashing block-level turnaround from days to hours. You resolve a tricky DRC with the foundry partner via WebEx, then mentor a junior on clock tree quality metrics.

Evenings wrap with cross-functional reviews, ensuring PPA targets align for tapeout. With 10% travel—perhaps to our Hyderabad site or customer meets—you thrive in this dynamic rhythm, contributing to chips that enable smarter factories and sustainable energy grids. This is physical design at ADI: high-stakes, collaborative, and profoundly impactful.

Why Bangalore, India for Your Engineering Career?

Bangalore, often called India's Silicon Valley, is a thriving metropolis in Karnataka where technology converges with innovation. Home to 13 million people, it boasts a perfect climate, world-class infrastructure, and a startup ecosystem rivaling Tel Aviv. Analog Devices' Aveda Meta campus sits in this epicenter, surrounded by giants like Infosys, Wipro, and global R&D hubs.

Why choose Bangalore? Unparalleled talent density—over 1.5 million IT professionals—fuels collaboration. The city's 300+ sunny days support outdoor pursuits, from Nandi Hills treks to Cubbon Park runs. Vibrant neighborhoods like Indiranagar offer farm-to-table dining, craft brews, and live music. UB City mall blends luxury shopping with cultural festivals like Bangalore Literature Fest.

For engineers, Electronic City and Whitefield host ADI's advanced labs, mere minutes from Kempegowda International Airport for global travel. Top universities like IISc produce cutting-edge talent, while accelerators like NSRCEL nurture ideas. Low living costs (30-50% below San Francisco) paired with high salaries yield exceptional quality of life. Public transport innovations like metro expansions and ride-sharing make commuting seamless. Bangalore isn't just a job location—it's a launchpad for semiconductor pioneers at Analog Devices.

Career Growth and Development at Analog Devices

At ADI, growth is engineered into your trajectory. Our Career Development Framework emphasizes Expertise, Autonomy & Scope, and Business Impact. As a Senior Physical Design Engineer, you'll advance from block ownership to chip leadership, then architecture influence. Internal mobility spans 24,000 global roles across Massachusetts, Ireland, Thailand, California, and beyond.

Invest in yourself with unlimited LinkedIn Learning, ADI University courses, and conference reimbursements (DAC, ISSCC). Mentorship programs pair you with directors; tech talks feature Nobel laureates. Certifications in Synopsys ICC2 or Siemens Calibre? Fully funded. High performers access LEADERSHIP tracks, with 70% promotions from within. In Bangalore, lead India-wide initiatives or transfer to Limerick, Ireland for EU projects. Your growth mirrors our innovation—Ahead of What's Possible™.

Rewards and Compensation Excellence

ADI rewards impact generously. Base salaries for seniors in Bangalore reflect global benchmarks, augmented by performance bonuses (15-25%), RSUs, and ESPP discounts. Comprehensive benefits include family health coverage, term life insurance, and gratuity. Enjoy 25+ paid leaves, sabbaticals post-5 years, and flexible hours.

Wellness shines with gym memberships, annual health checks, and EAP counseling. Parents receive 6-month maternity/paternity leave. Financial perks: PF matching, NPS contributions, and education allowances for kids. Relocation packages ease moves within India. Social impact via ADI Foundation volunteering earns paid time. In Bangalore's cost-effective landscape, your package stretches far—fueling homes in Koramangala or adventures to Coorg. Excellence demands premium rewards; ADI delivers.

Thriving Culture at Analog Devices Bangalore

ADI's culture pulses with Agility, Impact, Leadership, Innovation. In Bangalore, diverse teams from Tamil Nadu, Kerala, Karnataka blend perspectives on dosas and design. Hybrid models balance collaboration (team rooms with 8K displays) and focus. ERGs for women engineers, LGBTQ+, and veterans foster belonging.

Innovation Labs host hackathons yielding patents; Diwali sangeet and Holi parties build bonds. Leadership walks the talk—VP office hours welcome ideas. Recognition via monthly spotlights and global IMPACT awards. Sustainability drives our net-zero goals, with campus solar and e-waste drives. Equal opportunity is core: no bias on gender, caste, or background. In Aveda Meta's modern halls, you'll find purpose, camaraderie, and tools to excel. This is ADI culture—where engineers become legends.

Apply Now for Senior Physical Design Engineer

Ready to own the physical realm of next-gen semiconductors? Submit your resume highlighting 5+ years in advanced nodes, Innovus flows, and automation scripts. Include GitHub links or patent portfolios. Our Bangalore team reviews weekly; top candidates interview virtually then onsite. Expect technical deep-dives, behavioral scenarios, and culture fit chats. U.S. export compliance may apply for non-citizens.

Analog Devices is EEO employer. Join 24,000 innovators Ahead of What's Possible™. Apply Today.

Frequently Asked Questions

Locations

  • Bangalore, Karnataka, India

Salary

Estimated Salary Rangehigh confidence

120,000 - 180,000 USD / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • ASIC Physical Designintermediate
  • Floorplanning and Placementintermediate
  • Place-and-Route (PNR)intermediate
  • Static Timing Analysis (STA)intermediate
  • Clock Tree Synthesisintermediate
  • Physical Verification (DRC/LVS/ERC)intermediate
  • Cadence Innovusintermediate
  • Tcl Scriptingintermediate
  • Perl Automationintermediate
  • Python Scriptingintermediate
  • Low Power Design (UPF/CPF)intermediate
  • Multi-Voltage Domainsintermediate
  • Power Grid Designintermediate
  • Congestion Analysisintermediate
  • Timing Closureintermediate
  • Hierarchical Designintermediate
  • ESD/IR/EM Analysisintermediate
  • Advanced Nodes (16nm/7nm/5nm)intermediate
  • SoC Integrationintermediate
  • Mentoring Engineersintermediate
  • Cross-Functional Collaborationintermediate
  • EDA Tools Proficiencyintermediate
  • Automation Flowsintermediate
  • Sign-Off Methodologiesintermediate

Required Qualifications

  • Bachelor’s or Master’s in Electrical/Electronics Engineering (experience)
  • 5+ years in advanced ASIC/SoC physical design (experience)
  • Experience at 16nm and below nodes (experience)
  • Proficiency in floorplanning and PNR (experience)
  • Strong STA skills across PVT corners (experience)
  • Hands-on with Cadence Innovus (experience)
  • Physical verification expertise (DRC/LVS/ERC) (experience)
  • Scripting in Tcl, Perl, Python (experience)
  • Understanding of fabrication limits (experience)
  • ESD/IR/EM analysis knowledge (experience)
  • Hierarchical design experience (experience)
  • Low power methodologies (UPF/CPF) (experience)
  • Cross-functional collaboration skills (experience)
  • Mentoring junior engineers (experience)
  • Agile adaptation to business needs (experience)
  • Clear communication abilities (experience)

Responsibilities

  • Own end-to-end physical implementation for IP blocks/full-chips
  • Develop optimized floorplans including macro placement
  • Design IO rings and power grids
  • Perform congestion, area, timing analysis
  • Execute place-and-route using Cadence Innovus
  • Implement clock tree synthesis
  • Drive timing closure across PVT corners
  • Conduct detailed STA and sign-off
  • Resolve physical verification issues (DRC/LVS/ERC)
  • Partner with process/CAD/foundry teams
  • Automate design flows (hierarchical PNR, IO automation)
  • Enhance continuous flow improvements
  • Collaborate with RTL, DFT, verification teams
  • Meet PPA targets and milestones
  • Mentor and coach junior engineers
  • Document methodologies and best practices
  • Demonstrate ADI values: Agility, Impact, Leadership, Innovation

Benefits

  • general: Competitive salary and performance bonuses
  • general: Comprehensive health insurance coverage
  • general: Retirement savings plans with company match
  • general: Stock purchase and equity programs
  • general: Paid time off and flexible holidays
  • general: Parental leave and family support
  • general: Professional development tuition reimbursement
  • general: On-site fitness centers and wellness programs
  • general: Employee stock ownership plans
  • general: Relocation assistance for new hires
  • general: Hybrid work flexibility where applicable
  • general: Mental health and counseling services
  • general: Volunteer time off and charitable matching
  • general: Learning and development platforms
  • general: Global career mobility opportunities
  • general: Tech talks and innovation workshops
  • general: Cafeteria subsidies and meal programs

Target Your Resume for "Senior Physical Design Engineer Careers at Analog Devices in Bangalore, India | Apply Now" , Analog Devices

Get personalized recommendations to optimize your resume specifically for Senior Physical Design Engineer Careers at Analog Devices in Bangalore, India | Apply Now. Takes only 15 seconds!

AI-powered keyword optimization
Skills matching & gap analysis
Experience alignment suggestions

Check Your ATS Score for "Senior Physical Design Engineer Careers at Analog Devices in Bangalore, India | Apply Now" , Analog Devices

Find out how well your resume matches this job's requirements. Get comprehensive analysis including ATS compatibility, keyword matching, skill gaps, and personalized recommendations.

ATS compatibility check
Keyword optimization analysis
Skill matching & gap identification
Format & readability score

Tags & Categories

Senior Physical Design EngineerAnalog Devices careersASIC physical design jobsSoC floorplanning BangaloreCadence Innovus jobs IndiaSTA timing closureAdvanced node 7nm 5nmPhysical verification DRC LVSSemiconductor jobs BangaloreAnalog Devices BangaloreAveda Meta campusPNR automation scriptingLow power UPF CPFElectronics engineering jobsChip design careers IndiaHierarchical design SoCMentor junior engineersTech jobs KarnatakaGlobal semiconductor leaderEdge computing innovationADI physical designTapeout signoff expertEngineeringSemiconductorsASIC DesignPhysical DesignHardware

Answer 10 quick questions to check your fit for Senior Physical Design Engineer Careers at Analog Devices in Bangalore, India | Apply Now @ Analog Devices.

Quiz Challenge
10 Questions
~2 Minutes
Instant Score

Related Books and Jobs

No related jobs found at the moment.