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Staff DFT Engineer Careers at Analog Devices in Bangalore, India | Apply Now

Analog Devices

Staff DFT Engineer Careers at Analog Devices in Bangalore, India | Apply Now

full-timePosted: Jan 27, 2026

Job Description

Staff DFT Engineer Careers at Analog Devices in Bangalore, India

Overview: Leading DFT Innovation at Analog Devices in Bangalore

Analog Devices stands at the forefront of semiconductor innovation, bridging the physical and digital worlds to power the Intelligent Edge. With over $9 billion in FY24 revenue and 24,000 global employees, we're enabling breakthroughs in digitized factories, mobility, digital healthcare, climate solutions, and seamless human-world connectivity. In Bangalore, India – the Silicon Valley of Asia – our Aveda Meta campus is a hub of cutting-edge SoC development, where Staff DFT Engineers drive test strategies that ensure silicon excellence from architecture to production.

This senior role demands a visionary leader who owns the complete DFT lifecycle for complex SoCs. You'll architect scan chains, BIST structures, and test access ports while mentoring teams and collaborating across design, physical design, validation, and manufacturing. Operating with autonomy, you'll make pivotal decisions on test quality, coverage, and readiness, ensuring our chips meet the highest standards for high-volume production. Bangalore's thriving tech ecosystem, combined with Analog Devices' global resources, positions you to tackle the most challenging DFT problems in industry-leading technologies.

From defining low-power DFT for automotive-grade SoCs compliant with ISO 26262 to optimizing ATPG patterns for minimal test time, your expertise will directly impact products that transform industries. Join us to stay Ahead of What's Possible™ in a city pulsating with innovation.

A Day in the Life of a Staff DFT Engineer in Bangalore

Imagine starting your day at 9 AM in our state-of-the-art Aveda Meta facility, surrounded by Bangalore's vibrant energy. You dive into reviewing the latest ATPG coverage reports for a multi-core SoC, identifying a stubborn transition fault hole. A quick Python script automates the analysis, pinpointing a design fix needed in RTL.

By 10:30 AM, you're in a cross-functional sync with RTL designers and PD engineers, advocating for early testability insertions to avoid downstream pain. Lunch at the campus cafeteria sparks ideas on LBIST enhancements over discussions with peers from Hyderabad and Limerick offices.

Afternoon brings hands-on implementation: stitching compressed scan chains using Cadence Modus, closing DRCs, and verifying timing impacts. At 3 PM, you mentor two junior engineers on MBIST repair algorithms, reviewing their patterns and sharing silicon debug war stories. As silicon bring-up nears, you collaborate with product engineering on ATE patterns, simulating tester failures to preempt issues.

The day ends with strategic planning – architecting DFT for the next-gen chip, balancing area overhead against 99.9% coverage goals. With 10% travel to global sites and hybrid flexibility, your impact resonates worldwide from Bangalore's tech heart.

Why Bangalore, India? The Ultimate Destination for DFT Careers

Bangalore, India's premier tech metropolis, hosts over 25% of the nation's semiconductor talent. Home to giants like Intel, Texas Instruments, and now Analog Devices' expanding campus, it offers unmatched opportunities. The city's 1,500+ startups, world-class universities like IISc, and pleasant climate make it ideal for engineering excellence.

Our Aveda Meta site boasts cutting-edge labs, collaborative spaces, and proximity to Electronic City – Asia's largest electronics hub. Enjoy Bangalore's fusion of tradition and modernity: trek the Western Ghats weekends, savor dosas at iconic eateries, or attend global tech conferences. With English as the tech lingua franca, metro connectivity, and international airports, it's perfectly positioned for global careers. Low living costs amplify your salary's value, while cultural festivals like Diwali add vibrancy. For DFT pros, Bangalore means proximity to India's burgeoning automotive, industrial IoT, and 5G sectors – perfect alignment for Analog Devices' portfolio.

Career Growth: From Staff DFT to DFT Architect and Beyond

At Analog Devices, growth is engineered into your path. As Staff DFT Engineer, you'll lead multi-chip programs, evolving into Principal Architect roles overseeing portfolios. Our Individual Contributor track offers Principal Engineer and Distinguished Member paths, while management ladders lead to Director of DFT. 80% of leadership roles are filled internally.

Access global rotations to Massachusetts HQ, Ireland's Limerick site, or Thailand fabs. Tuition reimbursement covers advanced DFT certifications, Emulation training, or MBAs. Hackathons, patent programs, and publications amplify your profile. Bangalore's campus features dedicated growth coaches, quarterly reviews, and 360 feedback. We've promoted 40% of our Indian DFT staff in the last two years, with many leading safety-critical projects. Your journey: hands-on expert to strategic influencer shaping Analog Devices' test revolution.

Rewards: Exceptional Compensation and Comprehensive Benefits

Competitive base salaries for Staff DFT Engineers in Bangalore range from ₹40-70 lakhs annually, plus performance bonuses up to 20%, RSUs, and profit-sharing. Benefits include comprehensive health coverage for family, retirement matching, and employee stock purchase plans. Enjoy 25+ paid days off, parental leave, and wellness stipends.

Professional perks: conference sponsorships (DAC, ITC), tool training, and home office setups. On-site: gym, cafeterias, medical clinic, and shuttle services. Global mobility support for relocations. Our total rewards philosophy ensures you thrive personally and professionally in India's dynamic tech capital.

Culture: Innovation, Inclusion, and Impact at Analog Devices

Analog Devices cultivates a culture of bold innovation, where diverse thinkers converge. In Bangalore, our 500+ strong team embodies 'Ahead of What's Possible' through Women in Engineering groups, cricket leagues, and Diwali galas. We prioritize inclusion – 40% women in engineering roles, LGBTQ+ allies, and accessibility programs.

Collaboration thrives via agile pods, no-meeting Wednesdays, and open-door leadership. Recognition flows through peer awards, President's Club, and innovation grants. Sustainability drives us: net-zero goals, e-waste recycling, and green campus initiatives. Ethical AI and responsible innovation underpin our work. Join a culture where your DFT expertise fuels real-world impact, from safer cars to sustainable factories.

Apply Now: Your Next Career Step Awaits

Ready to own DFT strategies for world-changing SoCs? Submit your resume highlighting end-to-end DFT leadership, tool expertise, and silicon successes. Selected candidates enjoy technical interviews on ATPG optimization, architecture tradeoffs, and live debug scenarios, followed by leadership discussions. We're hiring now for immediate impact – don't miss this chance to elevate your career at Analog Devices in Bangalore.

Analog Devices is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.

Frequently Asked Questions

Locations

  • Bangalore, India

Salary

Estimated Salary Rangehigh confidence

120,000 - 200,000 USD / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • DFT Architecture Definitionintermediate
  • Scan Chain Insertion and Stitchingintermediate
  • ATPG Pattern Generationintermediate
  • Test Compression Optimizationintermediate
  • Logic BIST (LBIST) Implementationintermediate
  • Memory BIST (MBIST) with Repairintermediate
  • Boundary Scan (IEEE 1149.1)intermediate
  • JTAG TAP Integrationintermediate
  • DFT Rule Checks (DRC)intermediate
  • Low-Power DFT Techniquesintermediate
  • DFT-Specific STA Constraintsintermediate
  • Silicon Bring-Up and Debugintermediate
  • Yield Analysis and Optimizationintermediate
  • Perl/Tcl/Python Scriptingintermediate
  • Cadence Modus/Siemens Tessent Toolsintermediate
  • Cross-Functional Collaborationintermediate
  • Technical Leadership and Mentorshipintermediate
  • Pattern Volume Reductionintermediate
  • IR Drop and Power Analysisintermediate
  • Timing Closure for DFTintermediate
  • ECO Management for Silicon Issuesintermediate
  • Automotive Safety Standards (ISO 26262)intermediate
  • On-Chip Debug Featuresintermediate

Required Qualifications

  • Bachelor's or Master’s in Electrical/Electronics Engineering (experience)
  • 7+ years hands-on DFT experience (experience)
  • Proven end-to-end SoC DFT execution (experience)
  • Expertise in ATPG (stuck-at, transition, path delay) (experience)
  • Deep LBIST and MBIST knowledge (experience)
  • Scan compression and stitching mastery (experience)
  • Proficiency in Cadence and Siemens EDA tools (experience)
  • Strong Perl/Tcl/Python scripting skills (experience)
  • Experience leading DFT teams (experience)
  • Solid digital design fundamentals (RTL, Lint/CDC) (experience)
  • Low-power DFT techniques expertise (experience)
  • Boundary Scan and JTAG architecture (experience)
  • Silicon bring-up and production support (experience)
  • Cross-functional collaboration experience (experience)
  • Problem-solving in complex DFT issues (experience)

Responsibilities

  • Own DFT architecture for complex SoCs
  • Define scan, compression, BIST strategies
  • Drive testability in RTL design phase
  • Balance coverage, test time, power, area tradeoffs
  • Execute scan insertion, stitching, DRC closure
  • Generate and optimize ATPG patterns
  • Achieve high fault coverage with minimal patterns
  • Sign off DFT coverage, IR drop, power, timing
  • Debug DFT issues across RTL to gate-level
  • Support silicon bring-up and failure analysis
  • Collaborate with ATE and manufacturing teams
  • Drive ECOs for DFT silicon issues
  • Lead and mentor junior DFT engineers
  • Define DFT best practices and methodologies
  • Provide technical direction in design reviews
  • Communicate DFT risks to stakeholders

Benefits

  • general: Competitive salary with performance bonuses
  • general: Comprehensive health insurance coverage
  • general: Retirement savings plan with company match
  • general: Paid time off and flexible holidays
  • general: Professional development tuition reimbursement
  • general: Stock purchase plan with discounts
  • general: On-site fitness centers and wellness programs
  • general: Employee stock ownership opportunities
  • general: Parental leave and family support benefits
  • general: Mental health and counseling services
  • general: Hybrid work flexibility where applicable
  • general: Global mobility and relocation assistance
  • general: Learning stipends for certifications
  • general: Volunteer time off for community service
  • general: Comprehensive life and disability insurance
  • general: Employee assistance programs
  • general: Tech conferences and training sponsorships

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Tags & Categories

Staff DFT EngineerAnalog Devices careersDFT jobs BangaloreSoC DFT architectureATPG engineer IndiaScan compression jobsLBIST MBIST expertSilicon bring-up engineerSemiconductor test jobsCadence Modus TessentDFT leadership BangaloreASIC DFT implementationTest engineer Analog DevicesBoundary scan JTAGLow power DFTISO 26262 testPython Tcl DFT scriptingSemiconductor jobs IndiaStaff engineer DFTProduction test optimizationFault coverage analysisATE silicon debugEngineeringSemiconductorDFTASIC DesignTest Engineering

Answer 10 quick questions to check your fit for Staff DFT Engineer Careers at Analog Devices in Bangalore, India | Apply Now @ Analog Devices.

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Analog Devices logo

Staff DFT Engineer Careers at Analog Devices in Bangalore, India | Apply Now

Analog Devices

Staff DFT Engineer Careers at Analog Devices in Bangalore, India | Apply Now

full-timePosted: Jan 27, 2026

Job Description

Staff DFT Engineer Careers at Analog Devices in Bangalore, India

Overview: Leading DFT Innovation at Analog Devices in Bangalore

Analog Devices stands at the forefront of semiconductor innovation, bridging the physical and digital worlds to power the Intelligent Edge. With over $9 billion in FY24 revenue and 24,000 global employees, we're enabling breakthroughs in digitized factories, mobility, digital healthcare, climate solutions, and seamless human-world connectivity. In Bangalore, India – the Silicon Valley of Asia – our Aveda Meta campus is a hub of cutting-edge SoC development, where Staff DFT Engineers drive test strategies that ensure silicon excellence from architecture to production.

This senior role demands a visionary leader who owns the complete DFT lifecycle for complex SoCs. You'll architect scan chains, BIST structures, and test access ports while mentoring teams and collaborating across design, physical design, validation, and manufacturing. Operating with autonomy, you'll make pivotal decisions on test quality, coverage, and readiness, ensuring our chips meet the highest standards for high-volume production. Bangalore's thriving tech ecosystem, combined with Analog Devices' global resources, positions you to tackle the most challenging DFT problems in industry-leading technologies.

From defining low-power DFT for automotive-grade SoCs compliant with ISO 26262 to optimizing ATPG patterns for minimal test time, your expertise will directly impact products that transform industries. Join us to stay Ahead of What's Possible™ in a city pulsating with innovation.

A Day in the Life of a Staff DFT Engineer in Bangalore

Imagine starting your day at 9 AM in our state-of-the-art Aveda Meta facility, surrounded by Bangalore's vibrant energy. You dive into reviewing the latest ATPG coverage reports for a multi-core SoC, identifying a stubborn transition fault hole. A quick Python script automates the analysis, pinpointing a design fix needed in RTL.

By 10:30 AM, you're in a cross-functional sync with RTL designers and PD engineers, advocating for early testability insertions to avoid downstream pain. Lunch at the campus cafeteria sparks ideas on LBIST enhancements over discussions with peers from Hyderabad and Limerick offices.

Afternoon brings hands-on implementation: stitching compressed scan chains using Cadence Modus, closing DRCs, and verifying timing impacts. At 3 PM, you mentor two junior engineers on MBIST repair algorithms, reviewing their patterns and sharing silicon debug war stories. As silicon bring-up nears, you collaborate with product engineering on ATE patterns, simulating tester failures to preempt issues.

The day ends with strategic planning – architecting DFT for the next-gen chip, balancing area overhead against 99.9% coverage goals. With 10% travel to global sites and hybrid flexibility, your impact resonates worldwide from Bangalore's tech heart.

Why Bangalore, India? The Ultimate Destination for DFT Careers

Bangalore, India's premier tech metropolis, hosts over 25% of the nation's semiconductor talent. Home to giants like Intel, Texas Instruments, and now Analog Devices' expanding campus, it offers unmatched opportunities. The city's 1,500+ startups, world-class universities like IISc, and pleasant climate make it ideal for engineering excellence.

Our Aveda Meta site boasts cutting-edge labs, collaborative spaces, and proximity to Electronic City – Asia's largest electronics hub. Enjoy Bangalore's fusion of tradition and modernity: trek the Western Ghats weekends, savor dosas at iconic eateries, or attend global tech conferences. With English as the tech lingua franca, metro connectivity, and international airports, it's perfectly positioned for global careers. Low living costs amplify your salary's value, while cultural festivals like Diwali add vibrancy. For DFT pros, Bangalore means proximity to India's burgeoning automotive, industrial IoT, and 5G sectors – perfect alignment for Analog Devices' portfolio.

Career Growth: From Staff DFT to DFT Architect and Beyond

At Analog Devices, growth is engineered into your path. As Staff DFT Engineer, you'll lead multi-chip programs, evolving into Principal Architect roles overseeing portfolios. Our Individual Contributor track offers Principal Engineer and Distinguished Member paths, while management ladders lead to Director of DFT. 80% of leadership roles are filled internally.

Access global rotations to Massachusetts HQ, Ireland's Limerick site, or Thailand fabs. Tuition reimbursement covers advanced DFT certifications, Emulation training, or MBAs. Hackathons, patent programs, and publications amplify your profile. Bangalore's campus features dedicated growth coaches, quarterly reviews, and 360 feedback. We've promoted 40% of our Indian DFT staff in the last two years, with many leading safety-critical projects. Your journey: hands-on expert to strategic influencer shaping Analog Devices' test revolution.

Rewards: Exceptional Compensation and Comprehensive Benefits

Competitive base salaries for Staff DFT Engineers in Bangalore range from ₹40-70 lakhs annually, plus performance bonuses up to 20%, RSUs, and profit-sharing. Benefits include comprehensive health coverage for family, retirement matching, and employee stock purchase plans. Enjoy 25+ paid days off, parental leave, and wellness stipends.

Professional perks: conference sponsorships (DAC, ITC), tool training, and home office setups. On-site: gym, cafeterias, medical clinic, and shuttle services. Global mobility support for relocations. Our total rewards philosophy ensures you thrive personally and professionally in India's dynamic tech capital.

Culture: Innovation, Inclusion, and Impact at Analog Devices

Analog Devices cultivates a culture of bold innovation, where diverse thinkers converge. In Bangalore, our 500+ strong team embodies 'Ahead of What's Possible' through Women in Engineering groups, cricket leagues, and Diwali galas. We prioritize inclusion – 40% women in engineering roles, LGBTQ+ allies, and accessibility programs.

Collaboration thrives via agile pods, no-meeting Wednesdays, and open-door leadership. Recognition flows through peer awards, President's Club, and innovation grants. Sustainability drives us: net-zero goals, e-waste recycling, and green campus initiatives. Ethical AI and responsible innovation underpin our work. Join a culture where your DFT expertise fuels real-world impact, from safer cars to sustainable factories.

Apply Now: Your Next Career Step Awaits

Ready to own DFT strategies for world-changing SoCs? Submit your resume highlighting end-to-end DFT leadership, tool expertise, and silicon successes. Selected candidates enjoy technical interviews on ATPG optimization, architecture tradeoffs, and live debug scenarios, followed by leadership discussions. We're hiring now for immediate impact – don't miss this chance to elevate your career at Analog Devices in Bangalore.

Analog Devices is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.

Frequently Asked Questions

Locations

  • Bangalore, India

Salary

Estimated Salary Rangehigh confidence

120,000 - 200,000 USD / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • DFT Architecture Definitionintermediate
  • Scan Chain Insertion and Stitchingintermediate
  • ATPG Pattern Generationintermediate
  • Test Compression Optimizationintermediate
  • Logic BIST (LBIST) Implementationintermediate
  • Memory BIST (MBIST) with Repairintermediate
  • Boundary Scan (IEEE 1149.1)intermediate
  • JTAG TAP Integrationintermediate
  • DFT Rule Checks (DRC)intermediate
  • Low-Power DFT Techniquesintermediate
  • DFT-Specific STA Constraintsintermediate
  • Silicon Bring-Up and Debugintermediate
  • Yield Analysis and Optimizationintermediate
  • Perl/Tcl/Python Scriptingintermediate
  • Cadence Modus/Siemens Tessent Toolsintermediate
  • Cross-Functional Collaborationintermediate
  • Technical Leadership and Mentorshipintermediate
  • Pattern Volume Reductionintermediate
  • IR Drop and Power Analysisintermediate
  • Timing Closure for DFTintermediate
  • ECO Management for Silicon Issuesintermediate
  • Automotive Safety Standards (ISO 26262)intermediate
  • On-Chip Debug Featuresintermediate

Required Qualifications

  • Bachelor's or Master’s in Electrical/Electronics Engineering (experience)
  • 7+ years hands-on DFT experience (experience)
  • Proven end-to-end SoC DFT execution (experience)
  • Expertise in ATPG (stuck-at, transition, path delay) (experience)
  • Deep LBIST and MBIST knowledge (experience)
  • Scan compression and stitching mastery (experience)
  • Proficiency in Cadence and Siemens EDA tools (experience)
  • Strong Perl/Tcl/Python scripting skills (experience)
  • Experience leading DFT teams (experience)
  • Solid digital design fundamentals (RTL, Lint/CDC) (experience)
  • Low-power DFT techniques expertise (experience)
  • Boundary Scan and JTAG architecture (experience)
  • Silicon bring-up and production support (experience)
  • Cross-functional collaboration experience (experience)
  • Problem-solving in complex DFT issues (experience)

Responsibilities

  • Own DFT architecture for complex SoCs
  • Define scan, compression, BIST strategies
  • Drive testability in RTL design phase
  • Balance coverage, test time, power, area tradeoffs
  • Execute scan insertion, stitching, DRC closure
  • Generate and optimize ATPG patterns
  • Achieve high fault coverage with minimal patterns
  • Sign off DFT coverage, IR drop, power, timing
  • Debug DFT issues across RTL to gate-level
  • Support silicon bring-up and failure analysis
  • Collaborate with ATE and manufacturing teams
  • Drive ECOs for DFT silicon issues
  • Lead and mentor junior DFT engineers
  • Define DFT best practices and methodologies
  • Provide technical direction in design reviews
  • Communicate DFT risks to stakeholders

Benefits

  • general: Competitive salary with performance bonuses
  • general: Comprehensive health insurance coverage
  • general: Retirement savings plan with company match
  • general: Paid time off and flexible holidays
  • general: Professional development tuition reimbursement
  • general: Stock purchase plan with discounts
  • general: On-site fitness centers and wellness programs
  • general: Employee stock ownership opportunities
  • general: Parental leave and family support benefits
  • general: Mental health and counseling services
  • general: Hybrid work flexibility where applicable
  • general: Global mobility and relocation assistance
  • general: Learning stipends for certifications
  • general: Volunteer time off for community service
  • general: Comprehensive life and disability insurance
  • general: Employee assistance programs
  • general: Tech conferences and training sponsorships

Target Your Resume for "Staff DFT Engineer Careers at Analog Devices in Bangalore, India | Apply Now" , Analog Devices

Get personalized recommendations to optimize your resume specifically for Staff DFT Engineer Careers at Analog Devices in Bangalore, India | Apply Now. Takes only 15 seconds!

AI-powered keyword optimization
Skills matching & gap analysis
Experience alignment suggestions

Check Your ATS Score for "Staff DFT Engineer Careers at Analog Devices in Bangalore, India | Apply Now" , Analog Devices

Find out how well your resume matches this job's requirements. Get comprehensive analysis including ATS compatibility, keyword matching, skill gaps, and personalized recommendations.

ATS compatibility check
Keyword optimization analysis
Skill matching & gap identification
Format & readability score

Tags & Categories

Staff DFT EngineerAnalog Devices careersDFT jobs BangaloreSoC DFT architectureATPG engineer IndiaScan compression jobsLBIST MBIST expertSilicon bring-up engineerSemiconductor test jobsCadence Modus TessentDFT leadership BangaloreASIC DFT implementationTest engineer Analog DevicesBoundary scan JTAGLow power DFTISO 26262 testPython Tcl DFT scriptingSemiconductor jobs IndiaStaff engineer DFTProduction test optimizationFault coverage analysisATE silicon debugEngineeringSemiconductorDFTASIC DesignTest Engineering

Answer 10 quick questions to check your fit for Staff DFT Engineer Careers at Analog Devices in Bangalore, India | Apply Now @ Analog Devices.

Quiz Challenge
10 Questions
~2 Minutes
Instant Score

Related Books and Jobs

No related jobs found at the moment.