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Staff Engineer, Design Verification Engineering Careers at Analog Devices in Bangalore, India | Apply Now

Analog Devices

Staff Engineer, Design Verification Engineering Careers at Analog Devices in Bangalore, India | Apply Now

full-timePosted: Feb 3, 2026

Job Description

Staff Engineer, Design Verification Engineering Careers at Analog Devices in Bangalore, India

Overview: Leading SoC Verification at Analog Devices Bangalore

Analog Devices stands at the forefront of semiconductor innovation, bridging the physical and digital worlds to power the Intelligent Edge. With over $9 billion in revenue and 24,000 employees worldwide, our Bangalore campus in the heart of India's Silicon Valley represents a hub of cutting-edge SoC design and verification excellence. The Staff Engineer, Design Verification Engineering role offers a unique opportunity to own complex SoC-level verification for processor-based designs featuring ARM, RISC-V, and DSP cores.

This position demands a seasoned verification expert capable of driving end-to-end verification flows with minimal supervision. You'll lead ChipTop DV sign-off, develop sophisticated processor-driven scenarios, and champion verification quality across multi-processor, multi-bus environments. Bangalore's Aveda Meta campus provides state-of-the-art facilities including advanced simulation farms, collaborative workspaces, and direct access to global design centers.

Our verification teams tackle the most challenging aspects of modern SoC development: concurrency across heterogeneous processors, low-power state management, peripheral integration, and timing closure. This role positions you as a technical leader influencing verification strategy while mentoring the next generation of verification engineers.

A Day in the Life of a Staff Verification Engineer

Your day begins at 9 AM in our modern Bangalore campus, grabbing coffee from the on-site café while reviewing overnight regression results. By 9:30, you're diving into failure triage from the latest ChipTop run, correlating coverage gaps with design changes discussed in yesterday's standup.

Morning hours focus on developing targeted scenarios for tricky corner cases—interrupt storming across ARM and RISC-V cores while peripherals execute concurrent transactions. Mid-morning brings a cross-functional sync with the design team to resolve a bus protocol violation exposed by your stress tests.

Lunch offers networking opportunities in our diverse cafeteria serving global cuisines. Post-lunch, you lead a methodology review session, demonstrating enhanced UVM sequences that cut regression time by 25%. Afternoon involves GLS analysis, verifying clock stretching behavior during power state transitions.

By 4 PM, you're mentoring two junior engineers on coverage closure techniques while simultaneously reviewing power intent files for upcoming tapeout. The day wraps with documentation of verification progress and planning tomorrow's focus areas. Occasional customer syncs and architecture reviews add variety to the rhythm.

Why Bangalore, India – India's Silicon Valley

Bangalore, often called the Silicon Valley of India, hosts over 1,500 multinational tech companies and produces 40% of India's IT exports. Home to 13 million people, the city blends world-class infrastructure with rich cultural heritage. Analog Devices' Aveda Meta campus sits in the Electronic City hub, minutes from major highways and the upcoming airport metro.

The city's 300+ sunny days annually create perfect working conditions, complemented by pleasant evenings perfect for exploring Cubbon Park or dining at MG Road's vibrant restaurants. Bangalore's talent pool—over 1.5 million tech professionals—ensures constant innovation and knowledge sharing.

Our campus offers secure parking, shuttle services, on-site medical facilities, and recreational areas. Proximity to top engineering institutes like IISc and RV College provides unparalleled talent pipelines. The city's cosmopolitan vibe welcomes global talent with international schools, diverse communities, and weekend getaways to Coorg or Mysore.

Career Growth and Development Opportunities

Analog Devices invests heavily in employee growth through our Individual Development Plan process. Staff Engineers access technical leadership tracks, management paths, and global rotation programs. Our Bangalore team regularly presents at DAC, ITC, and DVCon, with conference attendance fully sponsored.

Mentorship programs pair you with senior directors while you guide junior engineers. Technical ladder progression includes Principal Engineer, Distinguished Engineer, and Fellow tracks. Cross-functional exposure spans design, physical implementation, firmware, and systems teams.

Learning stipends support certifications (UVM, ARM, RISC-V) and advanced degrees. Hackathons, patent programs, and innovation challenges accelerate career velocity. Global project assignments expose you to customer requirements from automotive, industrial, and communications domains.

Rewards and Compensation Excellence

Our total rewards package reflects Bangalore's competitive landscape while maintaining global standards. Base salaries exceed market medians, augmented by performance bonuses, stock grants, and profit sharing. Comprehensive health coverage includes family floater policies, dental, and vision care.

Flexible hybrid models balance campus collaboration with work-life harmony. Generous parental leave, adoption assistance, and fertility benefits support modern families. Retirement plans feature company matching up to 8% of salary.

Professional development budgets cover training, certifications, and conferences. On-site fitness centers, yoga classes, and wellness reimbursements promote holistic health. Relocation packages ease transitions for global talent.

Innovative Culture and Team Dynamics

Analog Devices cultivates a culture of psychological safety where engineers voice bold ideas without fear. Our verification teams practice agile ceremonies with two-week sprints focused on coverage milestones. Cross-pollination between design and verification prevents silos.

Bangalore's campus hosts quarterly hackathons, monthly tech talks, and annual innovation summits. Diversity initiatives celebrate Diwali, Christmas, and Ugadi with team events. Women@ADI and PRISM networks provide mentorship and advocacy.

Flat hierarchies empower Staff Engineers to influence tapeout decisions directly. Global town halls connect you with CEO Vincent Roche and CTOs. Volunteer programs support local STEM education and environmental initiatives.

Ready to Advance Verification Excellence?

Join Analog Devices Bangalore to shape the future of Intelligent Edge computing. This Staff Engineer role offers technical leadership, global impact, and career acceleration. Our team delivers silicon powering 5G infrastructure, autonomous vehicles, and smart factories.

Qualified candidates possess 8+ years of SoC verification experience with ARM/RISC-V processors. UVM expertise, coverage ownership, and cross-functional collaboration define success. US export compliance applies; Indian nationals face no restrictions.

Apply now to experience Bangalore's tech ecosystem while solving humanity's toughest engineering challenges. Your verification leadership will enable breakthroughs Ahead of What's Possible™.

Apply Now

Frequently Asked Questions

Locations

  • Bangalore, Karnataka, India

Salary

Estimated Salary Rangehigh confidence

120,000 - 180,000 USD / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • SystemVerilog (SV)intermediate
  • SystemC (USM)intermediate
  • UVM methodologyintermediate
  • ARM processor verificationintermediate
  • RISC-V architectureintermediate
  • DSP core testingintermediate
  • Functional coverage analysisintermediate
  • Code coverage closureintermediate
  • Gate-Level Simulation (GLS)intermediate
  • Timing-aware verificationintermediate
  • Clock domain crossing analysisintermediate
  • Low-power verificationintermediate
  • Power state transitionsintermediate
  • Regression planningintermediate
  • Failure triage and debugintermediate
  • Perl scriptingintermediate
  • Python automationintermediate
  • Verilog/VHDL simulationintermediate
  • Concurrency testingintermediate
  • Interrupt handling verificationintermediate
  • Peripheral interface validationintermediate
  • SoC bus protocols (AXI, AHB)intermediate
  • Stress and corner case testingintermediate
  • Mentoring and leadershipintermediate
  • Cross-functional collaborationintermediate
  • DV methodology developmentintermediate

Required Qualifications

  • Bachelor's or Master's in Electrical Engineering, Computer Engineering, or related field (experience)
  • 8+ years of experience in SoC design verification (experience)
  • Expertise in SystemVerilog and UVM environments (experience)
  • Proven experience with processor-based designs (ARM, RISC-V, DSP) (experience)
  • Strong understanding of verification methodologies (experience)
  • Experience with ChipTop DV sign-off processes (experience)
  • Proficiency in coverage-driven verification (experience)
  • Hands-on experience with GLS and timing simulations (experience)
  • Knowledge of low-power verification techniques (experience)
  • Excellent debugging and problem-solving skills (experience)
  • Experience leading verification teams (experience)
  • Familiarity with modern EDA tools (Cadence, Synopsys) (experience)
  • Strong communication and collaboration skills (experience)
  • Ability to work independently with minimal supervision (experience)
  • Experience with script automation (Perl, Python, TCL) (experience)

Responsibilities

  • Own and drive SoC-level functional verification for processor-based designs using SV/C (USM) environments
  • Develop and execute processor-driven verification scenarios including stress and corner cases
  • Lead verification of peripherals enabling concurrency testing across processors and buses
  • Own ChipTop DV sign-off including regression planning, execution, and coverage closure
  • Act as technical owner for DV quality, identifying gaps and driving improvements
  • Contribute to Gate-Level Simulation (GLS) and timing-aware verification
  • Analyze clock behavior including clock stretching and domain crossings
  • Support low-power verification aspects like power states and retention
  • Collaborate with Design, Physical Design, and Architecture teams
  • Mentor junior engineers and drive DV methodology improvements
  • Develop comprehensive test plans for SoC verification
  • Execute directed, constrained-random, and coverage-driven tests
  • Triage failures and perform root cause analysis
  • Maintain and enhance verification environments
  • Document verification results and generate sign-off reports
  • Participate in design reviews and verification planning

Benefits

  • general: Competitive salary with performance bonuses
  • general: Comprehensive health insurance coverage
  • general: Retirement savings plan with company match
  • general: Paid time off and flexible working hours
  • general: Professional development budget
  • general: Stock purchase plan with discounts
  • general: On-site fitness center and wellness programs
  • general: Employee assistance programs
  • general: Tuition reimbursement for advanced degrees
  • general: Relocation assistance for qualified candidates
  • general: Hybrid work model flexibility
  • general: Comprehensive parental leave policies
  • general: Mental health support resources
  • general: Volunteer time off program
  • general: Global career mobility opportunities
  • general: Technical conference attendance sponsorship
  • general: Cutting-edge hardware and software tools
  • general: Team building and social events

Target Your Resume for "Staff Engineer, Design Verification Engineering Careers at Analog Devices in Bangalore, India | Apply Now" , Analog Devices

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Tags & Categories

Staff Engineer Design VerificationSoC verification jobs BangaloreAnalog Devices careers IndiaARM processor verificationRISC-V verification engineerUVM SystemVerilog jobsChipTop DV signoffSemiconductor verification BangaloreDSP core verificationLow power verificationGate level simulation GLSCoverage driven verificationProcessor based SoC designDV methodology leadBangalore tech jobsElectronics engineer IndiaVerification leadership rolesMulti-processor verificationPeripheral verification testingEngineering jobs KarnatakaAnalog Devices BangaloreAveda Meta campus careersEngineeringSemiconductorsDesign VerificationSoC DevelopmentProcessor Architecture

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Analog Devices logo

Staff Engineer, Design Verification Engineering Careers at Analog Devices in Bangalore, India | Apply Now

Analog Devices

Staff Engineer, Design Verification Engineering Careers at Analog Devices in Bangalore, India | Apply Now

full-timePosted: Feb 3, 2026

Job Description

Staff Engineer, Design Verification Engineering Careers at Analog Devices in Bangalore, India

Overview: Leading SoC Verification at Analog Devices Bangalore

Analog Devices stands at the forefront of semiconductor innovation, bridging the physical and digital worlds to power the Intelligent Edge. With over $9 billion in revenue and 24,000 employees worldwide, our Bangalore campus in the heart of India's Silicon Valley represents a hub of cutting-edge SoC design and verification excellence. The Staff Engineer, Design Verification Engineering role offers a unique opportunity to own complex SoC-level verification for processor-based designs featuring ARM, RISC-V, and DSP cores.

This position demands a seasoned verification expert capable of driving end-to-end verification flows with minimal supervision. You'll lead ChipTop DV sign-off, develop sophisticated processor-driven scenarios, and champion verification quality across multi-processor, multi-bus environments. Bangalore's Aveda Meta campus provides state-of-the-art facilities including advanced simulation farms, collaborative workspaces, and direct access to global design centers.

Our verification teams tackle the most challenging aspects of modern SoC development: concurrency across heterogeneous processors, low-power state management, peripheral integration, and timing closure. This role positions you as a technical leader influencing verification strategy while mentoring the next generation of verification engineers.

A Day in the Life of a Staff Verification Engineer

Your day begins at 9 AM in our modern Bangalore campus, grabbing coffee from the on-site café while reviewing overnight regression results. By 9:30, you're diving into failure triage from the latest ChipTop run, correlating coverage gaps with design changes discussed in yesterday's standup.

Morning hours focus on developing targeted scenarios for tricky corner cases—interrupt storming across ARM and RISC-V cores while peripherals execute concurrent transactions. Mid-morning brings a cross-functional sync with the design team to resolve a bus protocol violation exposed by your stress tests.

Lunch offers networking opportunities in our diverse cafeteria serving global cuisines. Post-lunch, you lead a methodology review session, demonstrating enhanced UVM sequences that cut regression time by 25%. Afternoon involves GLS analysis, verifying clock stretching behavior during power state transitions.

By 4 PM, you're mentoring two junior engineers on coverage closure techniques while simultaneously reviewing power intent files for upcoming tapeout. The day wraps with documentation of verification progress and planning tomorrow's focus areas. Occasional customer syncs and architecture reviews add variety to the rhythm.

Why Bangalore, India – India's Silicon Valley

Bangalore, often called the Silicon Valley of India, hosts over 1,500 multinational tech companies and produces 40% of India's IT exports. Home to 13 million people, the city blends world-class infrastructure with rich cultural heritage. Analog Devices' Aveda Meta campus sits in the Electronic City hub, minutes from major highways and the upcoming airport metro.

The city's 300+ sunny days annually create perfect working conditions, complemented by pleasant evenings perfect for exploring Cubbon Park or dining at MG Road's vibrant restaurants. Bangalore's talent pool—over 1.5 million tech professionals—ensures constant innovation and knowledge sharing.

Our campus offers secure parking, shuttle services, on-site medical facilities, and recreational areas. Proximity to top engineering institutes like IISc and RV College provides unparalleled talent pipelines. The city's cosmopolitan vibe welcomes global talent with international schools, diverse communities, and weekend getaways to Coorg or Mysore.

Career Growth and Development Opportunities

Analog Devices invests heavily in employee growth through our Individual Development Plan process. Staff Engineers access technical leadership tracks, management paths, and global rotation programs. Our Bangalore team regularly presents at DAC, ITC, and DVCon, with conference attendance fully sponsored.

Mentorship programs pair you with senior directors while you guide junior engineers. Technical ladder progression includes Principal Engineer, Distinguished Engineer, and Fellow tracks. Cross-functional exposure spans design, physical implementation, firmware, and systems teams.

Learning stipends support certifications (UVM, ARM, RISC-V) and advanced degrees. Hackathons, patent programs, and innovation challenges accelerate career velocity. Global project assignments expose you to customer requirements from automotive, industrial, and communications domains.

Rewards and Compensation Excellence

Our total rewards package reflects Bangalore's competitive landscape while maintaining global standards. Base salaries exceed market medians, augmented by performance bonuses, stock grants, and profit sharing. Comprehensive health coverage includes family floater policies, dental, and vision care.

Flexible hybrid models balance campus collaboration with work-life harmony. Generous parental leave, adoption assistance, and fertility benefits support modern families. Retirement plans feature company matching up to 8% of salary.

Professional development budgets cover training, certifications, and conferences. On-site fitness centers, yoga classes, and wellness reimbursements promote holistic health. Relocation packages ease transitions for global talent.

Innovative Culture and Team Dynamics

Analog Devices cultivates a culture of psychological safety where engineers voice bold ideas without fear. Our verification teams practice agile ceremonies with two-week sprints focused on coverage milestones. Cross-pollination between design and verification prevents silos.

Bangalore's campus hosts quarterly hackathons, monthly tech talks, and annual innovation summits. Diversity initiatives celebrate Diwali, Christmas, and Ugadi with team events. Women@ADI and PRISM networks provide mentorship and advocacy.

Flat hierarchies empower Staff Engineers to influence tapeout decisions directly. Global town halls connect you with CEO Vincent Roche and CTOs. Volunteer programs support local STEM education and environmental initiatives.

Ready to Advance Verification Excellence?

Join Analog Devices Bangalore to shape the future of Intelligent Edge computing. This Staff Engineer role offers technical leadership, global impact, and career acceleration. Our team delivers silicon powering 5G infrastructure, autonomous vehicles, and smart factories.

Qualified candidates possess 8+ years of SoC verification experience with ARM/RISC-V processors. UVM expertise, coverage ownership, and cross-functional collaboration define success. US export compliance applies; Indian nationals face no restrictions.

Apply now to experience Bangalore's tech ecosystem while solving humanity's toughest engineering challenges. Your verification leadership will enable breakthroughs Ahead of What's Possible™.

Apply Now

Frequently Asked Questions

Locations

  • Bangalore, Karnataka, India

Salary

Estimated Salary Rangehigh confidence

120,000 - 180,000 USD / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • SystemVerilog (SV)intermediate
  • SystemC (USM)intermediate
  • UVM methodologyintermediate
  • ARM processor verificationintermediate
  • RISC-V architectureintermediate
  • DSP core testingintermediate
  • Functional coverage analysisintermediate
  • Code coverage closureintermediate
  • Gate-Level Simulation (GLS)intermediate
  • Timing-aware verificationintermediate
  • Clock domain crossing analysisintermediate
  • Low-power verificationintermediate
  • Power state transitionsintermediate
  • Regression planningintermediate
  • Failure triage and debugintermediate
  • Perl scriptingintermediate
  • Python automationintermediate
  • Verilog/VHDL simulationintermediate
  • Concurrency testingintermediate
  • Interrupt handling verificationintermediate
  • Peripheral interface validationintermediate
  • SoC bus protocols (AXI, AHB)intermediate
  • Stress and corner case testingintermediate
  • Mentoring and leadershipintermediate
  • Cross-functional collaborationintermediate
  • DV methodology developmentintermediate

Required Qualifications

  • Bachelor's or Master's in Electrical Engineering, Computer Engineering, or related field (experience)
  • 8+ years of experience in SoC design verification (experience)
  • Expertise in SystemVerilog and UVM environments (experience)
  • Proven experience with processor-based designs (ARM, RISC-V, DSP) (experience)
  • Strong understanding of verification methodologies (experience)
  • Experience with ChipTop DV sign-off processes (experience)
  • Proficiency in coverage-driven verification (experience)
  • Hands-on experience with GLS and timing simulations (experience)
  • Knowledge of low-power verification techniques (experience)
  • Excellent debugging and problem-solving skills (experience)
  • Experience leading verification teams (experience)
  • Familiarity with modern EDA tools (Cadence, Synopsys) (experience)
  • Strong communication and collaboration skills (experience)
  • Ability to work independently with minimal supervision (experience)
  • Experience with script automation (Perl, Python, TCL) (experience)

Responsibilities

  • Own and drive SoC-level functional verification for processor-based designs using SV/C (USM) environments
  • Develop and execute processor-driven verification scenarios including stress and corner cases
  • Lead verification of peripherals enabling concurrency testing across processors and buses
  • Own ChipTop DV sign-off including regression planning, execution, and coverage closure
  • Act as technical owner for DV quality, identifying gaps and driving improvements
  • Contribute to Gate-Level Simulation (GLS) and timing-aware verification
  • Analyze clock behavior including clock stretching and domain crossings
  • Support low-power verification aspects like power states and retention
  • Collaborate with Design, Physical Design, and Architecture teams
  • Mentor junior engineers and drive DV methodology improvements
  • Develop comprehensive test plans for SoC verification
  • Execute directed, constrained-random, and coverage-driven tests
  • Triage failures and perform root cause analysis
  • Maintain and enhance verification environments
  • Document verification results and generate sign-off reports
  • Participate in design reviews and verification planning

Benefits

  • general: Competitive salary with performance bonuses
  • general: Comprehensive health insurance coverage
  • general: Retirement savings plan with company match
  • general: Paid time off and flexible working hours
  • general: Professional development budget
  • general: Stock purchase plan with discounts
  • general: On-site fitness center and wellness programs
  • general: Employee assistance programs
  • general: Tuition reimbursement for advanced degrees
  • general: Relocation assistance for qualified candidates
  • general: Hybrid work model flexibility
  • general: Comprehensive parental leave policies
  • general: Mental health support resources
  • general: Volunteer time off program
  • general: Global career mobility opportunities
  • general: Technical conference attendance sponsorship
  • general: Cutting-edge hardware and software tools
  • general: Team building and social events

Target Your Resume for "Staff Engineer, Design Verification Engineering Careers at Analog Devices in Bangalore, India | Apply Now" , Analog Devices

Get personalized recommendations to optimize your resume specifically for Staff Engineer, Design Verification Engineering Careers at Analog Devices in Bangalore, India | Apply Now. Takes only 15 seconds!

AI-powered keyword optimization
Skills matching & gap analysis
Experience alignment suggestions

Check Your ATS Score for "Staff Engineer, Design Verification Engineering Careers at Analog Devices in Bangalore, India | Apply Now" , Analog Devices

Find out how well your resume matches this job's requirements. Get comprehensive analysis including ATS compatibility, keyword matching, skill gaps, and personalized recommendations.

ATS compatibility check
Keyword optimization analysis
Skill matching & gap identification
Format & readability score

Tags & Categories

Staff Engineer Design VerificationSoC verification jobs BangaloreAnalog Devices careers IndiaARM processor verificationRISC-V verification engineerUVM SystemVerilog jobsChipTop DV signoffSemiconductor verification BangaloreDSP core verificationLow power verificationGate level simulation GLSCoverage driven verificationProcessor based SoC designDV methodology leadBangalore tech jobsElectronics engineer IndiaVerification leadership rolesMulti-processor verificationPeripheral verification testingEngineering jobs KarnatakaAnalog Devices BangaloreAveda Meta campus careersEngineeringSemiconductorsDesign VerificationSoC DevelopmentProcessor Architecture

Answer 10 quick questions to check your fit for Staff Engineer, Design Verification Engineering Careers at Analog Devices in Bangalore, India | Apply Now @ Analog Devices.

Quiz Challenge
10 Questions
~2 Minutes
Instant Score

Related Books and Jobs

No related jobs found at the moment.