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Cellular RF Systems Engineering Intern – Phase Lock Loop

Apple

Engineering Jobs

Cellular RF Systems Engineering Intern – Phase Lock Loop

full-timePosted: Oct 1, 2025

Job Description

At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We invite you to join our dynamic group, for the outstanding and exciting opportunity to contribute to upcoming products that will delight and encourage millions of Apple’s customers every day. Apple's RF Systems Engineering team is looking for an intern in the area of phase locked loops. Our world-class team crafts the mobile market with forward-thinking concepts while being fully accountable for execution and commitments on timeline and quality. Come and deliver leading-edge phase locked loops (PLLs) for Apple’s wireless products that enable an outstanding customer experience! In this role as RFSE PLL intern, you will be part of the best-in-class cellular RFSE Team. You will work closely with transmitter and receiver architecture, RF design, Firmware and Silicon Validation teams.

Locations

  • Linz, Upper Austria, Austria 4010

Salary

Estimated Salary Rangemedium confidence

800,000 - 1,200,000 INR / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Required Qualifications

  • Experience in programming languages (preferred Matlab and C++) (experience)
  • You have basic understanding on frequency generation and phase locked loops (PLLs) (experience)
  • Basic knowledge of mobile communications (experience)
  • Strong problem solving and social skills. (experience)
  • Eagerness to learn new things and take up new challenges (experience)
  • Excellent communication skills, both written & verbal, would be very useful. (experience)
  • Available for 6 months or more (experience)

Preferred Qualifications

  • Currently enrolled in a Master Degree program in Electrical Engineering or Physics or Computer Science/engineering or equivalent. (degree in a master degree program in electrical engineering or physics or computer science)
  • The minimum salary pursuant to the CBA amounts to €39718,70 gross per year for full time employment. Actual salaries are oriented at current market salaries and take your qualifications and experience into account. (experience)

Responsibilities

  • In this role as RFSE PLL intern, you will be part of the best-in-class cellular RFSE Team. You will work closely with transmitter and receiver architecture, RF design, Firmware and Silicon Validation teams.
  • Your daily work includes the following tasks:
  • Learn PLL and clock architecture basics.
  • Work on real challenges to improve the PLL performance.
  • Help to develop and improve Matlab and C++ simulation environment.
  • Develop new algorithms/blocks to enhance PLL performance and architecture.
  • This includes development of test environments and scripts to verify these blocks.

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Apple logo

Cellular RF Systems Engineering Intern – Phase Lock Loop

Apple

Engineering Jobs

Cellular RF Systems Engineering Intern – Phase Lock Loop

full-timePosted: Oct 1, 2025

Job Description

At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We invite you to join our dynamic group, for the outstanding and exciting opportunity to contribute to upcoming products that will delight and encourage millions of Apple’s customers every day. Apple's RF Systems Engineering team is looking for an intern in the area of phase locked loops. Our world-class team crafts the mobile market with forward-thinking concepts while being fully accountable for execution and commitments on timeline and quality. Come and deliver leading-edge phase locked loops (PLLs) for Apple’s wireless products that enable an outstanding customer experience! In this role as RFSE PLL intern, you will be part of the best-in-class cellular RFSE Team. You will work closely with transmitter and receiver architecture, RF design, Firmware and Silicon Validation teams.

Locations

  • Linz, Upper Austria, Austria 4010

Salary

Estimated Salary Rangemedium confidence

800,000 - 1,200,000 INR / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Required Qualifications

  • Experience in programming languages (preferred Matlab and C++) (experience)
  • You have basic understanding on frequency generation and phase locked loops (PLLs) (experience)
  • Basic knowledge of mobile communications (experience)
  • Strong problem solving and social skills. (experience)
  • Eagerness to learn new things and take up new challenges (experience)
  • Excellent communication skills, both written & verbal, would be very useful. (experience)
  • Available for 6 months or more (experience)

Preferred Qualifications

  • Currently enrolled in a Master Degree program in Electrical Engineering or Physics or Computer Science/engineering or equivalent. (degree in a master degree program in electrical engineering or physics or computer science)
  • The minimum salary pursuant to the CBA amounts to €39718,70 gross per year for full time employment. Actual salaries are oriented at current market salaries and take your qualifications and experience into account. (experience)

Responsibilities

  • In this role as RFSE PLL intern, you will be part of the best-in-class cellular RFSE Team. You will work closely with transmitter and receiver architecture, RF design, Firmware and Silicon Validation teams.
  • Your daily work includes the following tasks:
  • Learn PLL and clock architecture basics.
  • Work on real challenges to improve the PLL performance.
  • Help to develop and improve Matlab and C++ simulation environment.
  • Develop new algorithms/blocks to enhance PLL performance and architecture.
  • This includes development of test environments and scripts to verify these blocks.

Target Your Resume for "Cellular RF Systems Engineering Intern – Phase Lock Loop" , Apple

Get personalized recommendations to optimize your resume specifically for Cellular RF Systems Engineering Intern – Phase Lock Loop. Takes only 15 seconds!

AI-powered keyword optimization
Skills matching & gap analysis
Experience alignment suggestions

Check Your ATS Score for "Cellular RF Systems Engineering Intern – Phase Lock Loop" , Apple

Find out how well your resume matches this job's requirements. Get comprehensive analysis including ATS compatibility, keyword matching, skill gaps, and personalized recommendations.

ATS compatibility check
Keyword optimization analysis
Skill matching & gap identification
Format & readability score

Tags & Categories

Hardware

Answer 10 quick questions to check your fit for Cellular RF Systems Engineering Intern – Phase Lock Loop @ Apple.

Quiz Challenge
10 Questions
~2 Minutes
Instant Score

Related Books and Jobs

No related jobs found at the moment.