CPU Implementation Methodology Engineer
Apple
CPU Implementation Methodology Engineer
Job Description
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hardworking people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product! As a member of the CPU implementation methodology team, you will help drive CPU design initiatives and flow development. This is a tremendous opportunity for an engineer with Synthesis and PNR experience to influence improvement for our design team. • Generate and validate new ideas, create flows and methodologies around them by working with CPU Designers, CAD teams and EDA tool vendors to improve PPA • Detailed analysis across partitions to understand optimization opportunities • Cross functional collaboration across STA, library, tech and post silicon teams to improve optimization during Implementation • Contribute to aspects of Synthesis and Physical Design Implementation methodologies
Locations
- Austin, Texas, United States 78727
Salary
Estimated Salary Rangemedium confidence
25,000,000 - 60,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- Synthesis experienceintermediate
- PNR experienceintermediate
- Generate and validate new ideasintermediate
- Create flows and methodologiesintermediate
- Working with CPU Designersintermediate
- Working with CAD teamsintermediate
- Working with EDA tool vendorsintermediate
- Improve PPAintermediate
- Detailed analysis across partitionsintermediate
- Understand optimization opportunitiesintermediate
- Cross functional collaborationintermediate
- Collaboration across STAintermediate
- Collaboration across libraryintermediate
- Collaboration across techintermediate
- Collaboration across post silicon teamsintermediate
- Improve optimization during Implementationintermediate
- Contribute to Synthesis methodologiesintermediate
- Contribute to Physical Design Implementation methodologiesintermediate
Required Qualifications
- Minimum BS and 3+ years of relevant industry experience (experience, 3 years)
- Experience with implementing VLSI digital designs using SAPR tools with multi-GHz performance goals (experience)
- Experience with logic optimization trade-offs between area, timing and power (experience)
Preferred Qualifications
- Experience implementing high-performance and low-power CPU designs (experience)
- Scripting skills to interface with tools and analyze data (experience)
- Experience with SAPR/PNR design flow infrastructure/scripts (experience)
- Proficiency in programming and scripting (Example: Python, TCL) (experience)
- Understanding of challenges related to latest deep sub-micron technology and ability to write algorithms and code to extract PPA during Implementation (experience)
- Strong interpersonal skills and ability to work effectively in a dynamic team environment (experience)
- Strong understanding and experience using industry standard synthesis, PnR, and STA tools (experience)
- Excellent debugging and problem-solving skills (experience)
Responsibilities
- • Generate and validate new ideas, create flows and methodologies around them by working with CPU Designers, CAD teams and EDA tool vendors to improve PPA
- • Detailed analysis across partitions to understand optimization opportunities
- • Cross functional collaboration across STA, library, tech and post silicon teams to improve optimization during Implementation
- • Contribute to aspects of Synthesis and Physical Design Implementation methodologies
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Answer 10 quick questions to check your fit for CPU Implementation Methodology Engineer @ Apple.
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~2 Minutes
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CPU Implementation Methodology Engineer
Apple
CPU Implementation Methodology Engineer
Job Description
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hardworking people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product! As a member of the CPU implementation methodology team, you will help drive CPU design initiatives and flow development. This is a tremendous opportunity for an engineer with Synthesis and PNR experience to influence improvement for our design team. • Generate and validate new ideas, create flows and methodologies around them by working with CPU Designers, CAD teams and EDA tool vendors to improve PPA • Detailed analysis across partitions to understand optimization opportunities • Cross functional collaboration across STA, library, tech and post silicon teams to improve optimization during Implementation • Contribute to aspects of Synthesis and Physical Design Implementation methodologies
Locations
- Austin, Texas, United States 78727
Salary
Estimated Salary Rangemedium confidence
25,000,000 - 60,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- Synthesis experienceintermediate
- PNR experienceintermediate
- Generate and validate new ideasintermediate
- Create flows and methodologiesintermediate
- Working with CPU Designersintermediate
- Working with CAD teamsintermediate
- Working with EDA tool vendorsintermediate
- Improve PPAintermediate
- Detailed analysis across partitionsintermediate
- Understand optimization opportunitiesintermediate
- Cross functional collaborationintermediate
- Collaboration across STAintermediate
- Collaboration across libraryintermediate
- Collaboration across techintermediate
- Collaboration across post silicon teamsintermediate
- Improve optimization during Implementationintermediate
- Contribute to Synthesis methodologiesintermediate
- Contribute to Physical Design Implementation methodologiesintermediate
Required Qualifications
- Minimum BS and 3+ years of relevant industry experience (experience, 3 years)
- Experience with implementing VLSI digital designs using SAPR tools with multi-GHz performance goals (experience)
- Experience with logic optimization trade-offs between area, timing and power (experience)
Preferred Qualifications
- Experience implementing high-performance and low-power CPU designs (experience)
- Scripting skills to interface with tools and analyze data (experience)
- Experience with SAPR/PNR design flow infrastructure/scripts (experience)
- Proficiency in programming and scripting (Example: Python, TCL) (experience)
- Understanding of challenges related to latest deep sub-micron technology and ability to write algorithms and code to extract PPA during Implementation (experience)
- Strong interpersonal skills and ability to work effectively in a dynamic team environment (experience)
- Strong understanding and experience using industry standard synthesis, PnR, and STA tools (experience)
- Excellent debugging and problem-solving skills (experience)
Responsibilities
- • Generate and validate new ideas, create flows and methodologies around them by working with CPU Designers, CAD teams and EDA tool vendors to improve PPA
- • Detailed analysis across partitions to understand optimization opportunities
- • Cross functional collaboration across STA, library, tech and post silicon teams to improve optimization during Implementation
- • Contribute to aspects of Synthesis and Physical Design Implementation methodologies
Tags & Categories
Answer 10 quick questions to check your fit for CPU Implementation Methodology Engineer @ Apple.
10 Questions
~2 Minutes
Instant Score
Related Books and Jobs