CPU Microarchitect/RTL Engineer - Fetch, Out of Order
Apple
CPU Microarchitect/RTL Engineer - Fetch, Out of Order
Job Description
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want to join us in these pursuits? Join us to help deliver the next groundbreaking Apple product! Apple’s Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced engineer to drive architecture and RTL development of CPU front-end and/or out-of-order subsystem for our performant cores. As a CPU Microarchitect/RTL Engineer, you will own or participate in the following: • Micro-architecture development and specification - from early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification • RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing goals • Verification - support the verification team in test bench development, formal methods, and simulation/emulation for functional verification • Performance exploration and correlation - explore high-performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance • Design delivery - work with multi-functional engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power
Locations
- Santa Clara, California, United States 95050
Salary
Estimated Salary Rangemedium confidence
30,000,000 - 80,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- Micro-architecture developmentintermediate
- RTL developmentintermediate
- Architectural explorationintermediate
- Micro-architectural researchintermediate
- RTL designintermediate
- Verificationintermediate
- Test bench developmentintermediate
- Formal methodsintermediate
- Simulationintermediate
- Emulationintermediate
- Functional verificationintermediate
- Performance explorationintermediate
- Performance verificationintermediate
- Physical designintermediate
- Timing analysisintermediate
- Area optimizationintermediate
- Reliability engineeringintermediate
- Testabilityintermediate
- Power optimizationintermediate
Required Qualifications
- Minimum BS and 3+ years of relevant industry experience (experience, 3 years)
- Experience with microprocessor architecture (experience)
- Experience with logic design principles with timing and power implications (experience)
- Experience in Verilog or VHDL (experience)
- Experience with simulators and waveform debugging process (experience)
Preferred Qualifications
- Expertise in one or more of the following areas: out-of-order execution, instruction scheduling, integer and floating point execution, load/store execution, cache and memory subsystems (experience)
- Understanding of low power microarchitecture techniques (experience)
- Understanding of high-performance techniques and trade-offs in a CPU microarchitecture (experience)
- Experience in C or C++ programming (experience)
- Experience using an interpretive language such as Perl or Python (experience)
Responsibilities
- As a CPU Microarchitect/RTL Engineer, you will own or participate in the following:
- • Micro-architecture development and specification - from early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification
- • RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing goals
- • Verification - support the verification team in test bench development, formal methods, and simulation/emulation for functional verification
- • Performance exploration and correlation - explore high-performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance
- • Design delivery - work with multi-functional engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power
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Answer 10 quick questions to check your fit for CPU Microarchitect/RTL Engineer - Fetch, Out of Order @ Apple.
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CPU Microarchitect/RTL Engineer - Fetch, Out of Order
Apple
CPU Microarchitect/RTL Engineer - Fetch, Out of Order
Job Description
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want to join us in these pursuits? Join us to help deliver the next groundbreaking Apple product! Apple’s Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced engineer to drive architecture and RTL development of CPU front-end and/or out-of-order subsystem for our performant cores. As a CPU Microarchitect/RTL Engineer, you will own or participate in the following: • Micro-architecture development and specification - from early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification • RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing goals • Verification - support the verification team in test bench development, formal methods, and simulation/emulation for functional verification • Performance exploration and correlation - explore high-performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance • Design delivery - work with multi-functional engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power
Locations
- Santa Clara, California, United States 95050
Salary
Estimated Salary Rangemedium confidence
30,000,000 - 80,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- Micro-architecture developmentintermediate
- RTL developmentintermediate
- Architectural explorationintermediate
- Micro-architectural researchintermediate
- RTL designintermediate
- Verificationintermediate
- Test bench developmentintermediate
- Formal methodsintermediate
- Simulationintermediate
- Emulationintermediate
- Functional verificationintermediate
- Performance explorationintermediate
- Performance verificationintermediate
- Physical designintermediate
- Timing analysisintermediate
- Area optimizationintermediate
- Reliability engineeringintermediate
- Testabilityintermediate
- Power optimizationintermediate
Required Qualifications
- Minimum BS and 3+ years of relevant industry experience (experience, 3 years)
- Experience with microprocessor architecture (experience)
- Experience with logic design principles with timing and power implications (experience)
- Experience in Verilog or VHDL (experience)
- Experience with simulators and waveform debugging process (experience)
Preferred Qualifications
- Expertise in one or more of the following areas: out-of-order execution, instruction scheduling, integer and floating point execution, load/store execution, cache and memory subsystems (experience)
- Understanding of low power microarchitecture techniques (experience)
- Understanding of high-performance techniques and trade-offs in a CPU microarchitecture (experience)
- Experience in C or C++ programming (experience)
- Experience using an interpretive language such as Perl or Python (experience)
Responsibilities
- As a CPU Microarchitect/RTL Engineer, you will own or participate in the following:
- • Micro-architecture development and specification - from early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification
- • RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing goals
- • Verification - support the verification team in test bench development, formal methods, and simulation/emulation for functional verification
- • Performance exploration and correlation - explore high-performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance
- • Design delivery - work with multi-functional engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power
Tags & Categories
Answer 10 quick questions to check your fit for CPU Microarchitect/RTL Engineer - Fetch, Out of Order @ Apple.
10 Questions
~2 Minutes
Instant Score
Related Books and Jobs