CPU Physical Electrical Analysis Engineer
Apple
CPU Physical Electrical Analysis Engineer
Job Description
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish! Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product! As a CPU Physical Electrical Analysis Engineer, you will be driving the block and top level design of power-grid and analysis of high performance compute blocks in the EMIR/SIGEM/Reliability space. • Drive block and top-level EMIR/electrical verification closure • Work on power grid design, construction, and implementation using existing infrastructures and where necessary, creating custom solutions in PNR tool environment • Work multi-functionally with CAD/EDA vendors to ensure fidelity of analysis results; with methodology teams to cover unique use cases; with implementation teams to drive design and sign-off closure, and with the SoC level teams to meet IP delivery quality and schedule
Locations
- Santa Clara, California, United States 95050
Salary
Estimated Salary Rangemedium confidence
25,000,000 - 60,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- EMIR/electrical verificationintermediate
- power grid designintermediate
- power grid constructionintermediate
- power grid implementationintermediate
- PNR tool environmentintermediate
- CAD/EDA vendor collaborationintermediate
- methodology developmentintermediate
- design sign-off closureintermediate
- IP deliveryintermediate
- SoC level integrationintermediate
Required Qualifications
- Minimum BS with 3+ years of relevant industry experience (experience, 3 years)
- Experience with PNR design implementation and STA (experience)
Preferred Qualifications
- Knowledge of computer architecture and RISC pipelines (experience)
- Experience in TCL-based automation with PNR & STA tools (experience)
- Familiarity with industry standard tools such as Siemens, Ansys Redhawk, Seascape, or Cadence Voltus (experience)
- Working knowledge of C/C++ (experience)
- Ability to write and maintain scripts in TCL, Python, or Perl (experience)
- Experience with data analysis techniques using Python or Perl (experience)
- Experience with matplotlib / pandas or similar data analytics packages (experience)
Responsibilities
- • Drive block and top-level EMIR/electrical verification closure
- • Work on power grid design, construction, and implementation using existing infrastructures and where necessary, creating custom solutions in PNR tool environment
- • Work multi-functionally with CAD/EDA vendors to ensure fidelity of analysis results; with methodology teams to cover unique use cases; with implementation teams to drive design and sign-off closure, and with the SoC level teams to meet IP delivery quality and schedule
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CPU Physical Electrical Analysis Engineer
Apple
CPU Physical Electrical Analysis Engineer
Job Description
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish! Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product! As a CPU Physical Electrical Analysis Engineer, you will be driving the block and top level design of power-grid and analysis of high performance compute blocks in the EMIR/SIGEM/Reliability space. • Drive block and top-level EMIR/electrical verification closure • Work on power grid design, construction, and implementation using existing infrastructures and where necessary, creating custom solutions in PNR tool environment • Work multi-functionally with CAD/EDA vendors to ensure fidelity of analysis results; with methodology teams to cover unique use cases; with implementation teams to drive design and sign-off closure, and with the SoC level teams to meet IP delivery quality and schedule
Locations
- Santa Clara, California, United States 95050
Salary
Estimated Salary Rangemedium confidence
25,000,000 - 60,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- EMIR/electrical verificationintermediate
- power grid designintermediate
- power grid constructionintermediate
- power grid implementationintermediate
- PNR tool environmentintermediate
- CAD/EDA vendor collaborationintermediate
- methodology developmentintermediate
- design sign-off closureintermediate
- IP deliveryintermediate
- SoC level integrationintermediate
Required Qualifications
- Minimum BS with 3+ years of relevant industry experience (experience, 3 years)
- Experience with PNR design implementation and STA (experience)
Preferred Qualifications
- Knowledge of computer architecture and RISC pipelines (experience)
- Experience in TCL-based automation with PNR & STA tools (experience)
- Familiarity with industry standard tools such as Siemens, Ansys Redhawk, Seascape, or Cadence Voltus (experience)
- Working knowledge of C/C++ (experience)
- Ability to write and maintain scripts in TCL, Python, or Perl (experience)
- Experience with data analysis techniques using Python or Perl (experience)
- Experience with matplotlib / pandas or similar data analytics packages (experience)
Responsibilities
- • Drive block and top-level EMIR/electrical verification closure
- • Work on power grid design, construction, and implementation using existing infrastructures and where necessary, creating custom solutions in PNR tool environment
- • Work multi-functionally with CAD/EDA vendors to ensure fidelity of analysis results; with methodology teams to cover unique use cases; with implementation teams to drive design and sign-off closure, and with the SoC level teams to meet IP delivery quality and schedule
Tags & Categories
Answer 10 quick questions to check your fit for CPU Physical Electrical Analysis Engineer @ Apple.
10 Questions
~2 Minutes
Instant Score
Related Books and Jobs