Design Verification Engineer - Camera
Apple
Design Verification Engineer - Camera
Job Description
Imagine what you could do here. At Apple, new ideas have a way of becoming great products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices - strengthening our dedication to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple products. The Pixel DV group works on complex, large-scale media IPs. We partner with our architecture and design teams to deliver high quality media IP and systems in order to meet the demanding requirements for excellent products, while boosting performance and meeting area and power goals, incorporating new high quality features. You will develop verification test plans, test benches, tools and infrastructure, protocol monitors and agents, and coverage driven stimulus. Apply advanced techniques to achieve verification with the highest quality, productivity, and time-to-market. Apply deep system level understanding to find system architecture bugs, verifying the DUT at multiple levels - from block level to the entire IP and subsystem, with additional emphasis on power (NLP) and performance. You will work closely with the design and architecture teams from the early stages of feature definition, to ensure timely delivery of quality designs. Working with methods to accelerate verification time. Involvement with Post Silicon Validation and other verification teams. Candidate should have good interpersonal and collaboration skills, to work with our partner Design and Architecture teams
Locations
- Israel, Israel
Salary
Estimated Salary Rangemedium confidence
25,000,000 - 50,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- develop verification test plansintermediate
- develop test benchesintermediate
- develop tools and infrastructureintermediate
- develop protocol monitors and agentsintermediate
- develop coverage driven stimulusintermediate
- apply advanced verification techniquesintermediate
- deep system level understandingintermediate
- find system architecture bugsintermediate
- verify DUT at multiple levelsintermediate
- block level verificationintermediate
- IP and subsystem verificationintermediate
- power (NLP) verificationintermediate
- performance verificationintermediate
- work closely with design and architecture teamsintermediate
- feature definition collaborationintermediate
- timely delivery of quality designsintermediate
- accelerate verification time methodsintermediate
- Post Silicon Validationintermediate
- good interpersonal skillsintermediate
- collaboration skillsintermediate
Required Qualifications
- +2 years experience in SoC Verification, media IP verification experience is a plus (experience, 2 years)
- You will need to have advanced knowledge of SoC/Media IP architecture/design & in-depth knowledge of verification flow. (experience)
- Expected to have a deep understanding and shown experience in advanced verification process, including dynamic and coverage based. (experience)
- Scripting and programming experience using several of the following: Python, Perl, e, SystemVerilog, C++, and TCL (experience)
Preferred Qualifications
- Familiarity with verification environments, UVM, SystemVerilog – an advantage. (experience)
- Knowledge of hardware acceleration – an advantage. (experience)
Responsibilities
- You will develop verification test plans, test benches, tools and infrastructure, protocol monitors and agents, and coverage driven stimulus.
- Apply advanced techniques to achieve verification with the highest quality, productivity, and time-to-market.
- Apply deep system level understanding to find system architecture bugs, verifying the DUT at multiple levels - from block level to the entire IP and subsystem, with additional emphasis on power (NLP) and performance.
- You will work closely with the design and architecture teams from the early stages of feature definition, to ensure timely delivery of quality designs.
- Working with methods to accelerate verification time.
- Involvement with Post Silicon Validation and other verification teams.
- Candidate should have good interpersonal and collaboration skills, to work with our partner Design and Architecture teams
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Answer 10 quick questions to check your fit for Design Verification Engineer - Camera @ Apple.
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Design Verification Engineer - Camera
Apple
Design Verification Engineer - Camera
Job Description
Imagine what you could do here. At Apple, new ideas have a way of becoming great products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices - strengthening our dedication to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple products. The Pixel DV group works on complex, large-scale media IPs. We partner with our architecture and design teams to deliver high quality media IP and systems in order to meet the demanding requirements for excellent products, while boosting performance and meeting area and power goals, incorporating new high quality features. You will develop verification test plans, test benches, tools and infrastructure, protocol monitors and agents, and coverage driven stimulus. Apply advanced techniques to achieve verification with the highest quality, productivity, and time-to-market. Apply deep system level understanding to find system architecture bugs, verifying the DUT at multiple levels - from block level to the entire IP and subsystem, with additional emphasis on power (NLP) and performance. You will work closely with the design and architecture teams from the early stages of feature definition, to ensure timely delivery of quality designs. Working with methods to accelerate verification time. Involvement with Post Silicon Validation and other verification teams. Candidate should have good interpersonal and collaboration skills, to work with our partner Design and Architecture teams
Locations
- Israel, Israel
Salary
Estimated Salary Rangemedium confidence
25,000,000 - 50,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- develop verification test plansintermediate
- develop test benchesintermediate
- develop tools and infrastructureintermediate
- develop protocol monitors and agentsintermediate
- develop coverage driven stimulusintermediate
- apply advanced verification techniquesintermediate
- deep system level understandingintermediate
- find system architecture bugsintermediate
- verify DUT at multiple levelsintermediate
- block level verificationintermediate
- IP and subsystem verificationintermediate
- power (NLP) verificationintermediate
- performance verificationintermediate
- work closely with design and architecture teamsintermediate
- feature definition collaborationintermediate
- timely delivery of quality designsintermediate
- accelerate verification time methodsintermediate
- Post Silicon Validationintermediate
- good interpersonal skillsintermediate
- collaboration skillsintermediate
Required Qualifications
- +2 years experience in SoC Verification, media IP verification experience is a plus (experience, 2 years)
- You will need to have advanced knowledge of SoC/Media IP architecture/design & in-depth knowledge of verification flow. (experience)
- Expected to have a deep understanding and shown experience in advanced verification process, including dynamic and coverage based. (experience)
- Scripting and programming experience using several of the following: Python, Perl, e, SystemVerilog, C++, and TCL (experience)
Preferred Qualifications
- Familiarity with verification environments, UVM, SystemVerilog – an advantage. (experience)
- Knowledge of hardware acceleration – an advantage. (experience)
Responsibilities
- You will develop verification test plans, test benches, tools and infrastructure, protocol monitors and agents, and coverage driven stimulus.
- Apply advanced techniques to achieve verification with the highest quality, productivity, and time-to-market.
- Apply deep system level understanding to find system architecture bugs, verifying the DUT at multiple levels - from block level to the entire IP and subsystem, with additional emphasis on power (NLP) and performance.
- You will work closely with the design and architecture teams from the early stages of feature definition, to ensure timely delivery of quality designs.
- Working with methods to accelerate verification time.
- Involvement with Post Silicon Validation and other verification teams.
- Candidate should have good interpersonal and collaboration skills, to work with our partner Design and Architecture teams
Tags & Categories
Answer 10 quick questions to check your fit for Design Verification Engineer - Camera @ Apple.
10 Questions
~2 Minutes
Instant Score
Related Books and Jobs