DRAM Design Validation Engineer
Apple
DRAM Design Validation Engineer
Job Description
Do you love crafting elegant solutions to highly sophisticated challenges? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, we will enable our customers to do all the things they love with their devices. As our DRAM Design Validation Engineer, you will be ensuring the successful integration of DRAM memories with SoC devices. Work with our design, verification and integration engineers to ensure memory controller and PHY requirements are well defined and cover the scope of DRAM based corner cases. Collaborate with Architecture, MCU, DDRPHY and DRAM vendors for Apple’s main memory feature. Ensure DRAM simulation meets Apple's requirements. Ensure the internal and external DRAM silicon and package level testing needs are met. Debug RMA material with apparent DRAM related defects.
Locations
- Cupertino, California, United States 95014
Salary
Estimated Salary Rangemedium confidence
25,000,000 - 60,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- DRAM Design Validationintermediate
- SoC Integrationintermediate
- Memory Controller Designintermediate
- PHY Requirements Definitionintermediate
- DRAM Simulationintermediate
- Silicon Testingintermediate
- Package Level Testingintermediate
- Debugging DRAM Defectsintermediate
- Collaboration with Design Engineersintermediate
- Collaboration with Verification Engineersintermediate
- Collaboration with Integration Engineersintermediate
- Collaboration with Architecture Teamsintermediate
- Collaboration with MCU Teamsintermediate
- Collaboration with DDRPHY Vendorsintermediate
- Collaboration with DRAM Vendorsintermediate
Required Qualifications
- MS or BS Degree with 4+ years in DRAM development (experience, 4 years)
Preferred Qualifications
- Expert in DRAM cell architectures (experience)
- Expert of DRAM memory organization and periphery design for low DRAM power (experience)
- Expertise in DRAM simulation (experience)
- Experience in memory interface verification with understanding DDR-PHY and Memory Controller (experience)
- Experience in LPDDR IO (DDR/DDR2/DDR3/DDR4/DDR5) characterization and qualification (experience)
- Understanding of memory test patterns (experience)
- Knowledge of DRAM reliability (experience)
- Knowledge with innovative packaging technology (POP, TSV, etc.) and their relationship to DRAM signal/power integrity (experience)
- Previous experience in Failure Analysis of DRAM devices (experience)
- Excellent hardware and software debug skill (experience)
- Experience working with the major DRAM vendors (experience)
- Strong background in computer architecture (experience)
- Programming experience in C/C++ (experience)
- Excellent interpersonal skills and teamwork. (experience)
Responsibilities
- Work with our design, verification and integration engineers to ensure memory controller and PHY requirements are well defined and cover the scope of DRAM based corner cases.
- Collaborate with Architecture, MCU, DDRPHY and DRAM vendors for Apple’s main memory feature.
- Ensure DRAM simulation meets Apple's requirements.
- Ensure the internal and external DRAM silicon and package level testing needs are met.
- Debug RMA material with apparent DRAM related defects.
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Answer 10 quick questions to check your fit for DRAM Design Validation Engineer @ Apple.
10 Questions
~2 Minutes
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DRAM Design Validation Engineer
Apple
DRAM Design Validation Engineer
Job Description
Do you love crafting elegant solutions to highly sophisticated challenges? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, we will enable our customers to do all the things they love with their devices. As our DRAM Design Validation Engineer, you will be ensuring the successful integration of DRAM memories with SoC devices. Work with our design, verification and integration engineers to ensure memory controller and PHY requirements are well defined and cover the scope of DRAM based corner cases. Collaborate with Architecture, MCU, DDRPHY and DRAM vendors for Apple’s main memory feature. Ensure DRAM simulation meets Apple's requirements. Ensure the internal and external DRAM silicon and package level testing needs are met. Debug RMA material with apparent DRAM related defects.
Locations
- Cupertino, California, United States 95014
Salary
Estimated Salary Rangemedium confidence
25,000,000 - 60,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- DRAM Design Validationintermediate
- SoC Integrationintermediate
- Memory Controller Designintermediate
- PHY Requirements Definitionintermediate
- DRAM Simulationintermediate
- Silicon Testingintermediate
- Package Level Testingintermediate
- Debugging DRAM Defectsintermediate
- Collaboration with Design Engineersintermediate
- Collaboration with Verification Engineersintermediate
- Collaboration with Integration Engineersintermediate
- Collaboration with Architecture Teamsintermediate
- Collaboration with MCU Teamsintermediate
- Collaboration with DDRPHY Vendorsintermediate
- Collaboration with DRAM Vendorsintermediate
Required Qualifications
- MS or BS Degree with 4+ years in DRAM development (experience, 4 years)
Preferred Qualifications
- Expert in DRAM cell architectures (experience)
- Expert of DRAM memory organization and periphery design for low DRAM power (experience)
- Expertise in DRAM simulation (experience)
- Experience in memory interface verification with understanding DDR-PHY and Memory Controller (experience)
- Experience in LPDDR IO (DDR/DDR2/DDR3/DDR4/DDR5) characterization and qualification (experience)
- Understanding of memory test patterns (experience)
- Knowledge of DRAM reliability (experience)
- Knowledge with innovative packaging technology (POP, TSV, etc.) and their relationship to DRAM signal/power integrity (experience)
- Previous experience in Failure Analysis of DRAM devices (experience)
- Excellent hardware and software debug skill (experience)
- Experience working with the major DRAM vendors (experience)
- Strong background in computer architecture (experience)
- Programming experience in C/C++ (experience)
- Excellent interpersonal skills and teamwork. (experience)
Responsibilities
- Work with our design, verification and integration engineers to ensure memory controller and PHY requirements are well defined and cover the scope of DRAM based corner cases.
- Collaborate with Architecture, MCU, DDRPHY and DRAM vendors for Apple’s main memory feature.
- Ensure DRAM simulation meets Apple's requirements.
- Ensure the internal and external DRAM silicon and package level testing needs are met.
- Debug RMA material with apparent DRAM related defects.
Tags & Categories
Answer 10 quick questions to check your fit for DRAM Design Validation Engineer @ Apple.
10 Questions
~2 Minutes
Instant Score
Related Books and Jobs