Power Integrity Engineer
Apple
Power Integrity Engineer
Job Description
Do you like to work on groundbreaking technologies that enable amazing new products? Do you have the attention for details and love for precision to work towards an outstanding result? We are looking for a dedicated and passionate SoC Power Integrity Engineer to join our team in Hardware Technology Group. In this role, you will be responsible for the development, implementation, and verification of Power Integrity solutions for SoCs used in Apple devices (iPhone/iPad/Mac etc.). You will work with cross-functional teams to define off-die droop budgets, design and implement an end-to-end power delivery network (PDN) solution throughout PMU/PCB/PKG/Interposer/Die, and verify the quality of the power integrity using lab measurements. • Power delivery modeling, simulation, and characterization for die, interposer, package, board, and Voltage Regulator. • Close collaboration with multi-functional teams to design end-to-end power delivery systems for both current and future generations. • Definition of the PDN architecture and design solution space for the target system • Broad responsibility on all SoC droop related topics, including on-die inrush, off-die droop budget, PDN sign-off, noise coupling analysis, voltage guard band, active droop mitigation etc.
Locations
- San Diego, California, United States 92128
- Santa Clara, California, United States 95050
Salary
Estimated Salary Rangemedium confidence
25,000,000 - 60,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- attention to detailintermediate
- precisionintermediate
- power delivery modelingintermediate
- power delivery simulationintermediate
- power delivery characterizationintermediate
- collaboration with cross-functional teamsintermediate
- designing end-to-end power delivery systemsintermediate
- definition of PDN architectureintermediate
- PDN designintermediate
- SoC droop analysisintermediate
- on-die inrush analysisintermediate
- off-die droop budget definitionintermediate
- PDN sign-offintermediate
- noise coupling analysisintermediate
- voltage guard band analysisintermediate
- active droop mitigationintermediate
- power integrity verificationintermediate
- lab measurementsintermediate
Required Qualifications
- BS and 3+ years of relevant industry experience. (experience, 3 years)
Preferred Qualifications
- M.S and or Ph.D. with academic background in Power/Signal Integrity, Analog Circuit Design or Electromagnetism. (experience)
- Proficiency in Python coding, AI/ML assisted automation experience. (experience)
- Experience in PI/SI methodology development, PDN modeling from system to die, and lab correlation/validation. (experience)
- Experience in design and analysis of product power supply solution. (experience)
- Understanding of power supply architecture covering voltage regulator technologies, PCB and package design trends and trade-offs, and chip supply design including low-power design methodologies. (experience)
- Deep understanding of Voltage Regulator design principles and electrical performance in the system environment. (experience)
- Good knowledge in 3D/2D EM simulation tools, electromagnetic and transmission line theory. (experience)
- Familiar with lab equipment including but not limited to VNA, real-time scope, spectrum analyzer. (experience)
- Ability to work and communicate efficiently in a multi-functional team. (experience)
Responsibilities
- • Power delivery modeling, simulation, and characterization for die, interposer, package, board, and Voltage Regulator.
- • Close collaboration with multi-functional teams to design end-to-end power delivery systems for both current and future generations.
- • Definition of the PDN architecture and design solution space for the target system
- • Broad responsibility on all SoC droop related topics, including on-die inrush, off-die droop budget, PDN sign-off, noise coupling analysis, voltage guard band, active droop mitigation etc.
- Conduct end-to-end simulation studies including modeling of die/interposer/PKG/PCB/PMU, to meet stringent impedance and voltage droop spec.
- Provide implementation guidelines and feedbacks to silicon, package, system design and other cross-functional teams.
- Perform feasibility study for silicon floorplan, advanced droop mitigation schemes, voltage regulator modeling and tuning, system mockup design etc.
- Perform model to hardware correlation on component and product/system level.
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Power Integrity Engineer
Apple
Power Integrity Engineer
Job Description
Do you like to work on groundbreaking technologies that enable amazing new products? Do you have the attention for details and love for precision to work towards an outstanding result? We are looking for a dedicated and passionate SoC Power Integrity Engineer to join our team in Hardware Technology Group. In this role, you will be responsible for the development, implementation, and verification of Power Integrity solutions for SoCs used in Apple devices (iPhone/iPad/Mac etc.). You will work with cross-functional teams to define off-die droop budgets, design and implement an end-to-end power delivery network (PDN) solution throughout PMU/PCB/PKG/Interposer/Die, and verify the quality of the power integrity using lab measurements. • Power delivery modeling, simulation, and characterization for die, interposer, package, board, and Voltage Regulator. • Close collaboration with multi-functional teams to design end-to-end power delivery systems for both current and future generations. • Definition of the PDN architecture and design solution space for the target system • Broad responsibility on all SoC droop related topics, including on-die inrush, off-die droop budget, PDN sign-off, noise coupling analysis, voltage guard band, active droop mitigation etc.
Locations
- San Diego, California, United States 92128
- Santa Clara, California, United States 95050
Salary
Estimated Salary Rangemedium confidence
25,000,000 - 60,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- attention to detailintermediate
- precisionintermediate
- power delivery modelingintermediate
- power delivery simulationintermediate
- power delivery characterizationintermediate
- collaboration with cross-functional teamsintermediate
- designing end-to-end power delivery systemsintermediate
- definition of PDN architectureintermediate
- PDN designintermediate
- SoC droop analysisintermediate
- on-die inrush analysisintermediate
- off-die droop budget definitionintermediate
- PDN sign-offintermediate
- noise coupling analysisintermediate
- voltage guard band analysisintermediate
- active droop mitigationintermediate
- power integrity verificationintermediate
- lab measurementsintermediate
Required Qualifications
- BS and 3+ years of relevant industry experience. (experience, 3 years)
Preferred Qualifications
- M.S and or Ph.D. with academic background in Power/Signal Integrity, Analog Circuit Design or Electromagnetism. (experience)
- Proficiency in Python coding, AI/ML assisted automation experience. (experience)
- Experience in PI/SI methodology development, PDN modeling from system to die, and lab correlation/validation. (experience)
- Experience in design and analysis of product power supply solution. (experience)
- Understanding of power supply architecture covering voltage regulator technologies, PCB and package design trends and trade-offs, and chip supply design including low-power design methodologies. (experience)
- Deep understanding of Voltage Regulator design principles and electrical performance in the system environment. (experience)
- Good knowledge in 3D/2D EM simulation tools, electromagnetic and transmission line theory. (experience)
- Familiar with lab equipment including but not limited to VNA, real-time scope, spectrum analyzer. (experience)
- Ability to work and communicate efficiently in a multi-functional team. (experience)
Responsibilities
- • Power delivery modeling, simulation, and characterization for die, interposer, package, board, and Voltage Regulator.
- • Close collaboration with multi-functional teams to design end-to-end power delivery systems for both current and future generations.
- • Definition of the PDN architecture and design solution space for the target system
- • Broad responsibility on all SoC droop related topics, including on-die inrush, off-die droop budget, PDN sign-off, noise coupling analysis, voltage guard band, active droop mitigation etc.
- Conduct end-to-end simulation studies including modeling of die/interposer/PKG/PCB/PMU, to meet stringent impedance and voltage droop spec.
- Provide implementation guidelines and feedbacks to silicon, package, system design and other cross-functional teams.
- Perform feasibility study for silicon floorplan, advanced droop mitigation schemes, voltage regulator modeling and tuning, system mockup design etc.
- Perform model to hardware correlation on component and product/system level.
Tags & Categories
Answer 10 quick questions to check your fit for Power Integrity Engineer @ Apple.
10 Questions
~2 Minutes
Instant Score
Related Books and Jobs