SoC DFT DV Engineer
Apple
SoC DFT DV Engineer
Job Description
Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, inquisitive people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it. Join us to help deliver the next phenomenal Apple product. Do you enjoy working on challenges that no one has solved yet? As a member of our multifaceted group, you will get the outstanding and rewarding opportunity to craft upcoming products that will delight and inspire millions of Apple’s customers every single day. Are you ready to join a team redefining hardware technology? We are searching for a hard-working engineer to join our exciting team of problem solvers. In this highly transparent and interactive role, your primary responsibilities will include: - Reviewing Architecture and Design Specifications. - Extracting design features and developing attributes and verification plans. - Working with designers to verify DFT implementation and run various checks. - Implementing test benches, generating advised/constrained random tests. - Debugging failures, running gate level simulations, supervising bugs, and closing coverage. - Handling schedules and supporting multi-functional engineering effort. - Assisting in verification flows, automation scripts and regressions. - Working with test engineers to bring up test patterns on silicon.
Locations
- Austin, Texas, United States 78727
- Cupertino, California, United States 95014
Salary
Estimated Salary Rangemedium confidence
25,000,000 - 50,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- Reviewing Architecture and Design Specificationsintermediate
- Extracting design featuresintermediate
- Developing attributes and verification plansintermediate
- Verifying DFT implementationintermediate
- Running various checksintermediate
- Implementing test benchesintermediate
- Generating advised/constrained random testsintermediate
- Debugging failuresintermediate
- Running gate level simulationsintermediate
- Supervising bugsintermediate
- Closing coverageintermediate
- Handling schedulesintermediate
- Supporting multi-functional engineering effortintermediate
- Assisting in verification flowsintermediate
- Writing automation scriptsintermediate
- Running regressionsintermediate
- Working with test engineersintermediate
- Bringing up test patterns on siliconintermediate
- Problem solvingintermediate
- Team collaborationintermediate
Required Qualifications
- Bachelors Degree + 3 Years of Experience. (experience, 3 years)
Preferred Qualifications
- Proven experience in large processors and/or SOC designs. (experience)
- Hands-on experience in directed or random verification, coverage analysis and assertions. (experience)
- Proficient in scripting languages such as Perl, Python or TCL (experience)
- Excellent skills in problem solving, communication and desire to seek new challenges. (experience)
- Good knowledge of general logic design, and exposure to DFT is a plus. (experience)
Responsibilities
- In this highly transparent and interactive role, your primary responsibilities will include:
- - Reviewing Architecture and Design Specifications.
- - Extracting design features and developing attributes and verification plans.
- - Working with designers to verify DFT implementation and run various checks.
- - Implementing test benches, generating advised/constrained random tests.
- - Debugging failures, running gate level simulations, supervising bugs, and closing coverage.
- - Handling schedules and supporting multi-functional engineering effort.
- - Assisting in verification flows, automation scripts and regressions.
- - Working with test engineers to bring up test patterns on silicon.
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Answer 10 quick questions to check your fit for SoC DFT DV Engineer @ Apple.
10 Questions
~2 Minutes
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SoC DFT DV Engineer
Apple
SoC DFT DV Engineer
Job Description
Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, inquisitive people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it. Join us to help deliver the next phenomenal Apple product. Do you enjoy working on challenges that no one has solved yet? As a member of our multifaceted group, you will get the outstanding and rewarding opportunity to craft upcoming products that will delight and inspire millions of Apple’s customers every single day. Are you ready to join a team redefining hardware technology? We are searching for a hard-working engineer to join our exciting team of problem solvers. In this highly transparent and interactive role, your primary responsibilities will include: - Reviewing Architecture and Design Specifications. - Extracting design features and developing attributes and verification plans. - Working with designers to verify DFT implementation and run various checks. - Implementing test benches, generating advised/constrained random tests. - Debugging failures, running gate level simulations, supervising bugs, and closing coverage. - Handling schedules and supporting multi-functional engineering effort. - Assisting in verification flows, automation scripts and regressions. - Working with test engineers to bring up test patterns on silicon.
Locations
- Austin, Texas, United States 78727
- Cupertino, California, United States 95014
Salary
Estimated Salary Rangemedium confidence
25,000,000 - 50,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- Reviewing Architecture and Design Specificationsintermediate
- Extracting design featuresintermediate
- Developing attributes and verification plansintermediate
- Verifying DFT implementationintermediate
- Running various checksintermediate
- Implementing test benchesintermediate
- Generating advised/constrained random testsintermediate
- Debugging failuresintermediate
- Running gate level simulationsintermediate
- Supervising bugsintermediate
- Closing coverageintermediate
- Handling schedulesintermediate
- Supporting multi-functional engineering effortintermediate
- Assisting in verification flowsintermediate
- Writing automation scriptsintermediate
- Running regressionsintermediate
- Working with test engineersintermediate
- Bringing up test patterns on siliconintermediate
- Problem solvingintermediate
- Team collaborationintermediate
Required Qualifications
- Bachelors Degree + 3 Years of Experience. (experience, 3 years)
Preferred Qualifications
- Proven experience in large processors and/or SOC designs. (experience)
- Hands-on experience in directed or random verification, coverage analysis and assertions. (experience)
- Proficient in scripting languages such as Perl, Python or TCL (experience)
- Excellent skills in problem solving, communication and desire to seek new challenges. (experience)
- Good knowledge of general logic design, and exposure to DFT is a plus. (experience)
Responsibilities
- In this highly transparent and interactive role, your primary responsibilities will include:
- - Reviewing Architecture and Design Specifications.
- - Extracting design features and developing attributes and verification plans.
- - Working with designers to verify DFT implementation and run various checks.
- - Implementing test benches, generating advised/constrained random tests.
- - Debugging failures, running gate level simulations, supervising bugs, and closing coverage.
- - Handling schedules and supporting multi-functional engineering effort.
- - Assisting in verification flows, automation scripts and regressions.
- - Working with test engineers to bring up test patterns on silicon.
Tags & Categories
Answer 10 quick questions to check your fit for SoC DFT DV Engineer @ Apple.
10 Questions
~2 Minutes
Instant Score
Related Books and Jobs