SoC Full Chip DV Engineer
Apple
SoC Full Chip DV Engineer
Job Description
Does making the next great technology product excite you? Imagine what you could do here. At Apple, our new insights have a way of becoming great products, services, and customer experiences very quickly. We bring passion and dedication to our job and when you are a part of that team there's no telling what we'll could accomplish. Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple’s premier SOCs. This is a critical job within Apple's Hardware Technology, and we'd love to have you join us. As part of a very talented team, we are at the heart of the chip design effort collaborating with all fields (vertical product model)! You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design and architecture specifications and work closely with design & micro-architecture teams. A key component to the job is understanding the functional & performance goals of the design and you use this knowledge to test effectively. You develop test plans; tests & coverage plans as well as define our next generation verification methodology & test benches. It's required that you communicate and collaborate with design, architecture and software to understand the use cases and corner conditions and drive test cases. We also require additional responsibilities such as running and triaging regressions, tracking bugs, and analyzing coverage to achieve top results.
Locations
- Austin, Texas, United States 78727
- Cupertino, California, United States 95014
Salary
Estimated Salary Rangemedium confidence
30,000,000 - 60,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- Design Verificationintermediate
- Verifying Functionality and Performanceintermediate
- Reviewing Design and Architecture Specificationsintermediate
- Collaborating with Design and Micro-architecture Teamsintermediate
- Understanding Functional and Performance Goalsintermediate
- Developing Test Plansintermediate
- Developing Testsintermediate
- Developing Coverage Plansintermediate
- Defining Verification Methodologyintermediate
- Defining Test Benchesintermediate
- Communicating with Design Teamsintermediate
- Communicating with Architecture Teamsintermediate
- Communicating with Software Teamsintermediate
- Understanding Use Casesintermediate
- Understanding Corner Conditionsintermediate
- Driving Test Casesintermediate
- Running Regressionsintermediate
- Triaging Regressionsintermediate
- Tracking Bugsintermediate
- Analyzing Coverageintermediate
Required Qualifications
- Minimum of BS + 0 years relevant industry experience. (experience)
Preferred Qualifications
- Skilled in many aspects of digital verification such as constrained random verification process, functional coverage, code coverage, assertion methodology & philosophy (experience)
- Knowledge of Verilog/SystemVerilog, digital simulation and debug (experience)
- Knowledge of computer architecture and digital design fundamentals (experience)
- Ability to work independently to deliver the project goals (experience)
- Exposure to UVM is desired (experience)
- Experience with C/C++, assembly is a plus (experience)
- Experience with perl, python or similar scripting language (experience)
- Excellent interpersonal skills and the dream to take on diverse challenges (experience)
Responsibilities
- As part of a very talented team, we are at the heart of the chip design effort collaborating with all fields (vertical product model)! You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design and architecture specifications and work closely with design & micro-architecture teams. A key component to the job is understanding the functional & performance goals of the design and you use this knowledge to test effectively. You develop test plans; tests & coverage plans as well as define our next generation verification methodology & test benches. It's required that you communicate and collaborate with design, architecture and software to understand the use cases and corner conditions and drive test cases. We also require additional responsibilities such as running and triaging regressions, tracking bugs, and analyzing coverage to achieve top results.
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Answer 10 quick questions to check your fit for SoC Full Chip DV Engineer @ Apple.
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SoC Full Chip DV Engineer
Apple
SoC Full Chip DV Engineer
Job Description
Does making the next great technology product excite you? Imagine what you could do here. At Apple, our new insights have a way of becoming great products, services, and customer experiences very quickly. We bring passion and dedication to our job and when you are a part of that team there's no telling what we'll could accomplish. Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple’s premier SOCs. This is a critical job within Apple's Hardware Technology, and we'd love to have you join us. As part of a very talented team, we are at the heart of the chip design effort collaborating with all fields (vertical product model)! You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design and architecture specifications and work closely with design & micro-architecture teams. A key component to the job is understanding the functional & performance goals of the design and you use this knowledge to test effectively. You develop test plans; tests & coverage plans as well as define our next generation verification methodology & test benches. It's required that you communicate and collaborate with design, architecture and software to understand the use cases and corner conditions and drive test cases. We also require additional responsibilities such as running and triaging regressions, tracking bugs, and analyzing coverage to achieve top results.
Locations
- Austin, Texas, United States 78727
- Cupertino, California, United States 95014
Salary
Estimated Salary Rangemedium confidence
30,000,000 - 60,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- Design Verificationintermediate
- Verifying Functionality and Performanceintermediate
- Reviewing Design and Architecture Specificationsintermediate
- Collaborating with Design and Micro-architecture Teamsintermediate
- Understanding Functional and Performance Goalsintermediate
- Developing Test Plansintermediate
- Developing Testsintermediate
- Developing Coverage Plansintermediate
- Defining Verification Methodologyintermediate
- Defining Test Benchesintermediate
- Communicating with Design Teamsintermediate
- Communicating with Architecture Teamsintermediate
- Communicating with Software Teamsintermediate
- Understanding Use Casesintermediate
- Understanding Corner Conditionsintermediate
- Driving Test Casesintermediate
- Running Regressionsintermediate
- Triaging Regressionsintermediate
- Tracking Bugsintermediate
- Analyzing Coverageintermediate
Required Qualifications
- Minimum of BS + 0 years relevant industry experience. (experience)
Preferred Qualifications
- Skilled in many aspects of digital verification such as constrained random verification process, functional coverage, code coverage, assertion methodology & philosophy (experience)
- Knowledge of Verilog/SystemVerilog, digital simulation and debug (experience)
- Knowledge of computer architecture and digital design fundamentals (experience)
- Ability to work independently to deliver the project goals (experience)
- Exposure to UVM is desired (experience)
- Experience with C/C++, assembly is a plus (experience)
- Experience with perl, python or similar scripting language (experience)
- Excellent interpersonal skills and the dream to take on diverse challenges (experience)
Responsibilities
- As part of a very talented team, we are at the heart of the chip design effort collaborating with all fields (vertical product model)! You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design and architecture specifications and work closely with design & micro-architecture teams. A key component to the job is understanding the functional & performance goals of the design and you use this knowledge to test effectively. You develop test plans; tests & coverage plans as well as define our next generation verification methodology & test benches. It's required that you communicate and collaborate with design, architecture and software to understand the use cases and corner conditions and drive test cases. We also require additional responsibilities such as running and triaging regressions, tracking bugs, and analyzing coverage to achieve top results.
Tags & Categories
Answer 10 quick questions to check your fit for SoC Full Chip DV Engineer @ Apple.
10 Questions
~2 Minutes
Instant Score
Related Books and Jobs