SoC Physical Design Engineer
Apple
SoC Physical Design Engineer
Job Description
As a member of our Physical Design group, you will take an integral part in bringing large scale SoCs to life, helping us deliver the next generation of Apple's ground-breaking products. You will own the physical design cycle at the partition/IP/Chip levels, including netlist to GDS implementation and verification. Are you ready to join some of the world's leading engineers and work with state of the art design flows and process technology? If you possess the knowledge and experience in any of the physical design domains and practices with track record of tape-outs in sub-micron technology, come join our group! As a member of our Physical Design team in this highly visible role, you will directly own implementation and verification of design partition(s) / IPs (netlist to delivery of our final GDS) for a highly complex SoC utilizing state of the art process technology. • Implementation - Block level PnR, floor-planning, clock, power planning and distribution. • Verification and Analysis - Static Timing closure using commercial tools, Physical Verification as well as Electrical/Power Analysis (EM / IR-Drop / Xtalk / noise )
Locations
- Israel, Israel
Salary
Estimated Salary Rangemedium confidence
25,000,000 - 60,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- physical design cycle ownershipintermediate
- netlist to GDS implementationintermediate
- netlist to GDS verificationintermediate
- block level PnRintermediate
- floor-planningintermediate
- clock planningintermediate
- power planningintermediate
- power distributionintermediate
- static timing closureintermediate
- physical verificationintermediate
- electrical analysisintermediate
- power analysisintermediate
- EM analysisintermediate
- IR-Drop analysisintermediate
- Xtalk analysisintermediate
- noise analysisintermediate
- sub-micron technology tape-outsintermediate
Required Qualifications
- 5+ years of experience in physical design of large scale SoCs (experience, 5 years)
- B.Sc / M.Sc Electric Engineering / Computer Engineering (experience)
- Extensive experience with one of the place & route tools (Synopsys / Cadence) (experience)
- Scripting and Programming experience using either TCL or Python or Perl or known Shell scripting languages (experience)
Preferred Qualifications
- Knowledge in Verilog – advantage (experience)
Responsibilities
- As a member of our Physical Design team in this highly visible role, you will directly own implementation and verification of design partition(s) / IPs (netlist to delivery of our final GDS) for a highly complex SoC utilizing state of the art process technology.
- * Implementation - Block level PnR, floor-planning, clock, power planning and distribution.
- * Verification and Analysis - Static Timing closure using commercial tools, Physical Verification as well as Electrical/Power Analysis (EM / IR-Drop / Xtalk / noise )
Tags & Categories
Answer 10 quick questions to check your fit for SoC Physical Design Engineer @ Apple.
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~2 Minutes
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SoC Physical Design Engineer
Apple
SoC Physical Design Engineer
Job Description
As a member of our Physical Design group, you will take an integral part in bringing large scale SoCs to life, helping us deliver the next generation of Apple's ground-breaking products. You will own the physical design cycle at the partition/IP/Chip levels, including netlist to GDS implementation and verification. Are you ready to join some of the world's leading engineers and work with state of the art design flows and process technology? If you possess the knowledge and experience in any of the physical design domains and practices with track record of tape-outs in sub-micron technology, come join our group! As a member of our Physical Design team in this highly visible role, you will directly own implementation and verification of design partition(s) / IPs (netlist to delivery of our final GDS) for a highly complex SoC utilizing state of the art process technology. • Implementation - Block level PnR, floor-planning, clock, power planning and distribution. • Verification and Analysis - Static Timing closure using commercial tools, Physical Verification as well as Electrical/Power Analysis (EM / IR-Drop / Xtalk / noise )
Locations
- Israel, Israel
Salary
Estimated Salary Rangemedium confidence
25,000,000 - 60,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- physical design cycle ownershipintermediate
- netlist to GDS implementationintermediate
- netlist to GDS verificationintermediate
- block level PnRintermediate
- floor-planningintermediate
- clock planningintermediate
- power planningintermediate
- power distributionintermediate
- static timing closureintermediate
- physical verificationintermediate
- electrical analysisintermediate
- power analysisintermediate
- EM analysisintermediate
- IR-Drop analysisintermediate
- Xtalk analysisintermediate
- noise analysisintermediate
- sub-micron technology tape-outsintermediate
Required Qualifications
- 5+ years of experience in physical design of large scale SoCs (experience, 5 years)
- B.Sc / M.Sc Electric Engineering / Computer Engineering (experience)
- Extensive experience with one of the place & route tools (Synopsys / Cadence) (experience)
- Scripting and Programming experience using either TCL or Python or Perl or known Shell scripting languages (experience)
Preferred Qualifications
- Knowledge in Verilog – advantage (experience)
Responsibilities
- As a member of our Physical Design team in this highly visible role, you will directly own implementation and verification of design partition(s) / IPs (netlist to delivery of our final GDS) for a highly complex SoC utilizing state of the art process technology.
- * Implementation - Block level PnR, floor-planning, clock, power planning and distribution.
- * Verification and Analysis - Static Timing closure using commercial tools, Physical Verification as well as Electrical/Power Analysis (EM / IR-Drop / Xtalk / noise )
Tags & Categories
Answer 10 quick questions to check your fit for SoC Physical Design Engineer @ Apple.
10 Questions
~2 Minutes
Instant Score
Related Books and Jobs