Wireless SoC Design Engineer
Apple
Wireless SoC Design Engineer
Job Description
Come and join Apple’s growing wireless silicon development team. Our wireless SoC organization is responsible for all aspects of wireless silicon development, emphasizing highly energy-efficient design and new technologies that transform the user experience at the product level. All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. If you enjoy a fast-paced and challenging environment, collaborate with people across different functional areas, and thrive during crisis times, we encourage you to apply. In this role you will work on a small team designing CPU-based subsystems for high performance, low power wireless SoCs. As a member of the team, you will work closely with SoC architects and IP developers to develop SoCs that meet the power, performance, and area goals for Apple devices, with a particular focus on low power metrics. You will engage in hardware/software/power partitioning discussions alongside software, firmware, and platform engineering teams. You will integrate industry standard and custom hardware IPs into SoCs. This is a highly visible role, where you will be at the center of the ASIC design efforts, collaborating with all fields, with a critical impact in getting leading-edge products launched to delight millions of customers.
Locations
- Los Angeles Metro Area, California, United States
- San Francisco Bay Area, California, United States
- San Diego, California, United States 92128
Salary
Estimated Salary Rangemedium confidence
25,000,000 - 60,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- energy-efficient designintermediate
- RF/Analog architecture and designintermediate
- Systems/PHY/MAC architecture and designintermediate
- VLSI/RTL design and integrationintermediate
- Emulationintermediate
- Design Verificationintermediate
- Test and Validationintermediate
- FW/SW engineeringintermediate
- designing CPU-based subsystemsintermediate
- develop SoCsintermediate
- hardware/software/power partitioningintermediate
- integrate hardware IPs into SoCsintermediate
- ASIC designintermediate
- collaborationintermediate
- thrive in fast-paced environmentintermediate
- thrive during crisis timesintermediate
Required Qualifications
- BS with 3+ years relevant experience. (experience, 3 years)
- Familiarity with the ASIC design flow. (experience)
- Knowledge of digital design, SoC architecture, and HDL languages like Verilog. (experience)
Preferred Qualifications
- Shown experience writing micro-architecture specifications and converting them to design (experience)
- Exposure to design methodologies and industry standard EDA tools. (experience)
- Experience with AXI/AHB bus fabric and processor sub-systems. (experience)
- Understanding of UPF and low-power design & implementation techniques. (experience)
- Self-starter and willingness to learn. (experience)
Responsibilities
- In this role you will work on a small team designing CPU-based subsystems for high performance, low power wireless SoCs. As a member of the team, you will work closely with SoC architects and IP developers to develop SoCs that meet the power, performance, and area goals for Apple devices, with a particular focus on low power metrics. You will engage in hardware/software/power partitioning discussions alongside software, firmware, and platform engineering teams. You will integrate industry standard and custom hardware IPs into SoCs. This is a highly visible role, where you will be at the center of the ASIC design efforts, collaborating with all fields, with a critical impact in getting leading-edge products launched to delight millions of customers.
- Writing micro-architecture and design specifications.
- Coding design in SystemVerilog following established design guidelines, owning all aspects of RTL development design.
- Integrate IP blocks and optimize memories/hard macros required for the block.
- Supporting verification efforts at multiple levels.
- Checking your design with industry standard static tools such as LINT, CDC, RDC.
- Analyzing and optimizing area, timing, and power.
- Collaborate with multi-disciplinary groups to make sure designs are delivered on time and with the highest quality by incorporating proper checks at every stage of the design process.
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Answer 10 quick questions to check your fit for Wireless SoC Design Engineer @ Apple.
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Wireless SoC Design Engineer
Apple
Wireless SoC Design Engineer
Job Description
Come and join Apple’s growing wireless silicon development team. Our wireless SoC organization is responsible for all aspects of wireless silicon development, emphasizing highly energy-efficient design and new technologies that transform the user experience at the product level. All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. If you enjoy a fast-paced and challenging environment, collaborate with people across different functional areas, and thrive during crisis times, we encourage you to apply. In this role you will work on a small team designing CPU-based subsystems for high performance, low power wireless SoCs. As a member of the team, you will work closely with SoC architects and IP developers to develop SoCs that meet the power, performance, and area goals for Apple devices, with a particular focus on low power metrics. You will engage in hardware/software/power partitioning discussions alongside software, firmware, and platform engineering teams. You will integrate industry standard and custom hardware IPs into SoCs. This is a highly visible role, where you will be at the center of the ASIC design efforts, collaborating with all fields, with a critical impact in getting leading-edge products launched to delight millions of customers.
Locations
- Los Angeles Metro Area, California, United States
- San Francisco Bay Area, California, United States
- San Diego, California, United States 92128
Salary
Estimated Salary Rangemedium confidence
25,000,000 - 60,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- energy-efficient designintermediate
- RF/Analog architecture and designintermediate
- Systems/PHY/MAC architecture and designintermediate
- VLSI/RTL design and integrationintermediate
- Emulationintermediate
- Design Verificationintermediate
- Test and Validationintermediate
- FW/SW engineeringintermediate
- designing CPU-based subsystemsintermediate
- develop SoCsintermediate
- hardware/software/power partitioningintermediate
- integrate hardware IPs into SoCsintermediate
- ASIC designintermediate
- collaborationintermediate
- thrive in fast-paced environmentintermediate
- thrive during crisis timesintermediate
Required Qualifications
- BS with 3+ years relevant experience. (experience, 3 years)
- Familiarity with the ASIC design flow. (experience)
- Knowledge of digital design, SoC architecture, and HDL languages like Verilog. (experience)
Preferred Qualifications
- Shown experience writing micro-architecture specifications and converting them to design (experience)
- Exposure to design methodologies and industry standard EDA tools. (experience)
- Experience with AXI/AHB bus fabric and processor sub-systems. (experience)
- Understanding of UPF and low-power design & implementation techniques. (experience)
- Self-starter and willingness to learn. (experience)
Responsibilities
- In this role you will work on a small team designing CPU-based subsystems for high performance, low power wireless SoCs. As a member of the team, you will work closely with SoC architects and IP developers to develop SoCs that meet the power, performance, and area goals for Apple devices, with a particular focus on low power metrics. You will engage in hardware/software/power partitioning discussions alongside software, firmware, and platform engineering teams. You will integrate industry standard and custom hardware IPs into SoCs. This is a highly visible role, where you will be at the center of the ASIC design efforts, collaborating with all fields, with a critical impact in getting leading-edge products launched to delight millions of customers.
- Writing micro-architecture and design specifications.
- Coding design in SystemVerilog following established design guidelines, owning all aspects of RTL development design.
- Integrate IP blocks and optimize memories/hard macros required for the block.
- Supporting verification efforts at multiple levels.
- Checking your design with industry standard static tools such as LINT, CDC, RDC.
- Analyzing and optimizing area, timing, and power.
- Collaborate with multi-disciplinary groups to make sure designs are delivered on time and with the highest quality by incorporating proper checks at every stage of the design process.
Tags & Categories
Answer 10 quick questions to check your fit for Wireless SoC Design Engineer @ Apple.
10 Questions
~2 Minutes
Instant Score
Related Books and Jobs