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Analog Layout Engineer

Capgemini

Engineering Jobs

Analog Layout Engineer

full-timePosted: Aug 12, 2025

Job Description

Analog Layout Engineer

📋 Job Overview

The Analog Layout Engineer at Capgemini Engineering will design and develop custom mixed-signal layouts for semiconductor projects, focusing on critical analog blocks and full chip integration. The role involves performing verifications, ensuring on-time delivery, and collaborating with cross-functional teams to meet project milestones. Candidates will guide junior members and resolve technical issues to maintain high-quality standards in advanced technology nodes.

📍 Location: Hyderabad

💼 Experience Level: Experienced Professionals

🏢 Business Unit: Engineering and RandD Services

🎯 Key Responsibilities

  • Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support
  • Perform layout verification like LVS/DRC/Antenna, EM, quality check and documentation
  • Responsible for on-time delivery of block-level/top-level layouts with acceptable quality
  • Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment
  • Guide junior team-members in their execution of Sub block-level layouts & review their work
  • Should have good experience in working with cross-functional team
  • Ensure standard processes and procedures are followed to resolve all client queries
  • Handle technical escalations through effective diagnosis and troubleshooting of client queries
  • Manage and resolve technical roadblocks/escalations to timely deliverable with high quality
  • Troubleshoot all client queries in a user-friendly, courteous, and professional manner
  • Offer alternative solutions to clients (where appropriate) with the objective of retaining customers' and clients' business
  • Build people capability to ensure operational excellence and maintain superior customer service levels of the existing account/client
  • Contribute to effective project-management
  • Effectively communicating with engineering teams in different Geographical locations to assure the success of the layout project

✅ Required Qualifications

  • 6 to 8 years of Semiconductor industry experience in Custom Mixed-Signal layout design
  • Bachelor’s degree in Electrical or Electronic Engineering or equivalent
  • Able to deliver Custom analog layouts independently from schematic to layout generation, estimating the area, optimizing floorplan, routing, and complete verification flows
  • Firsthand experience in critical analog layout design blocks such as Temperature sensor, Serdes, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc.
  • Good at LVS/DRC debugging skills and other verifications for lower technology nodes - 14nm FinFet and below
  • Good understanding of Matching, EM, ESD, Latch-Up, Shielding, Parasitic and short channel concepts
  • Familiar with EDA tools like Cadence VLE/VXL, PVS, Assura and Calibre DRC/LVS
  • Understanding layout effects on the circuit such as speed, capacitance, power, and area etc.
  • Ability to understand design constraints and implement high-quality layouts
  • Excellent communication
  • Responsible for timely execution with high quality of layout design

⭐ Preferred Qualifications

  • Multiple Tape out support experience and collaborating with cross functional teams
  • Good people skills and critical thinking abilities to resolve the issue technically and professionally
  • Multiple foundries experience

🛠️ Required Skills

  • Custom Mixed-Signal layout design
  • Analog layout design
  • Schematic to layout generation
  • Area estimation
  • Floorplan optimization
  • Routing
  • Verification flows
  • Temperature sensor
  • Serdes
  • PLL
  • ADC
  • DAC
  • LDO
  • Bandgap
  • Ref Generators
  • Charge Pump
  • Current Mirrors
  • Comparator
  • Differential Amplifier
  • LVS/DRC debugging
  • 14nm FinFet and below technology nodes
  • Matching
  • EM
  • ESD
  • Latch-Up
  • Shielding
  • Parasitic
  • Short channel concepts
  • Cadence VLE/VXL
  • PVS
  • Assura
  • Calibre DRC/LVS
  • Layout effects on speed, capacitance, power, area
  • Design constraints implementation
  • Tape out support
  • Cross-functional collaboration
  • People skills
  • Critical thinking
  • Communication
  • Leadership in planning, estimation, scheduling, delegation
  • Team guidance and review
  • Project management
  • Troubleshooting
  • Client query resolution

Locations

  • Hyderabad, India

Salary

Estimated Salary Rangemedium confidence

2,500,000 - 4,200,000 INR / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • Custom Mixed-Signal layout designintermediate
  • Analog layout designintermediate
  • Schematic to layout generationintermediate
  • Area estimationintermediate
  • Floorplan optimizationintermediate
  • Routingintermediate
  • Verification flowsintermediate
  • Temperature sensorintermediate
  • Serdesintermediate
  • PLLintermediate
  • ADCintermediate
  • DACintermediate
  • LDOintermediate
  • Bandgapintermediate
  • Ref Generatorsintermediate
  • Charge Pumpintermediate
  • Current Mirrorsintermediate
  • Comparatorintermediate
  • Differential Amplifierintermediate
  • LVS/DRC debuggingintermediate
  • 14nm FinFet and below technology nodesintermediate
  • Matchingintermediate
  • EMintermediate
  • ESDintermediate
  • Latch-Upintermediate
  • Shieldingintermediate
  • Parasiticintermediate
  • Short channel conceptsintermediate
  • Cadence VLE/VXLintermediate
  • PVSintermediate
  • Assuraintermediate
  • Calibre DRC/LVSintermediate
  • Layout effects on speed, capacitance, power, areaintermediate
  • Design constraints implementationintermediate
  • Tape out supportintermediate
  • Cross-functional collaborationintermediate
  • People skillsintermediate
  • Critical thinkingintermediate
  • Communicationintermediate
  • Leadership in planning, estimation, scheduling, delegationintermediate
  • Team guidance and reviewintermediate
  • Project managementintermediate
  • Troubleshootingintermediate
  • Client query resolutionintermediate

Required Qualifications

  • 6 to 8 years of Semiconductor industry experience in Custom Mixed-Signal layout design (experience)
  • Bachelor’s degree in Electrical or Electronic Engineering or equivalent (experience)
  • Able to deliver Custom analog layouts independently from schematic to layout generation, estimating the area, optimizing floorplan, routing, and complete verification flows (experience)
  • Firsthand experience in critical analog layout design blocks such as Temperature sensor, Serdes, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc. (experience)
  • Good at LVS/DRC debugging skills and other verifications for lower technology nodes - 14nm FinFet and below (experience)
  • Good understanding of Matching, EM, ESD, Latch-Up, Shielding, Parasitic and short channel concepts (experience)
  • Familiar with EDA tools like Cadence VLE/VXL, PVS, Assura and Calibre DRC/LVS (experience)
  • Understanding layout effects on the circuit such as speed, capacitance, power, and area etc. (experience)
  • Ability to understand design constraints and implement high-quality layouts (experience)
  • Excellent communication (experience)
  • Responsible for timely execution with high quality of layout design (experience)

Preferred Qualifications

  • Multiple Tape out support experience and collaborating with cross functional teams (experience)
  • Good people skills and critical thinking abilities to resolve the issue technically and professionally (experience)
  • Multiple foundries experience (experience)

Responsibilities

  • Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support
  • Perform layout verification like LVS/DRC/Antenna, EM, quality check and documentation
  • Responsible for on-time delivery of block-level/top-level layouts with acceptable quality
  • Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment
  • Guide junior team-members in their execution of Sub block-level layouts & review their work
  • Should have good experience in working with cross-functional team
  • Ensure standard processes and procedures are followed to resolve all client queries
  • Handle technical escalations through effective diagnosis and troubleshooting of client queries
  • Manage and resolve technical roadblocks/escalations to timely deliverable with high quality
  • Troubleshoot all client queries in a user-friendly, courteous, and professional manner
  • Offer alternative solutions to clients (where appropriate) with the objective of retaining customers' and clients' business
  • Build people capability to ensure operational excellence and maintain superior customer service levels of the existing account/client
  • Contribute to effective project-management
  • Effectively communicating with engineering teams in different Geographical locations to assure the success of the layout project

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Capgemini logo

Analog Layout Engineer

Capgemini

Engineering Jobs

Analog Layout Engineer

full-timePosted: Aug 12, 2025

Job Description

Analog Layout Engineer

📋 Job Overview

The Analog Layout Engineer at Capgemini Engineering will design and develop custom mixed-signal layouts for semiconductor projects, focusing on critical analog blocks and full chip integration. The role involves performing verifications, ensuring on-time delivery, and collaborating with cross-functional teams to meet project milestones. Candidates will guide junior members and resolve technical issues to maintain high-quality standards in advanced technology nodes.

📍 Location: Hyderabad

💼 Experience Level: Experienced Professionals

🏢 Business Unit: Engineering and RandD Services

🎯 Key Responsibilities

  • Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support
  • Perform layout verification like LVS/DRC/Antenna, EM, quality check and documentation
  • Responsible for on-time delivery of block-level/top-level layouts with acceptable quality
  • Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment
  • Guide junior team-members in their execution of Sub block-level layouts & review their work
  • Should have good experience in working with cross-functional team
  • Ensure standard processes and procedures are followed to resolve all client queries
  • Handle technical escalations through effective diagnosis and troubleshooting of client queries
  • Manage and resolve technical roadblocks/escalations to timely deliverable with high quality
  • Troubleshoot all client queries in a user-friendly, courteous, and professional manner
  • Offer alternative solutions to clients (where appropriate) with the objective of retaining customers' and clients' business
  • Build people capability to ensure operational excellence and maintain superior customer service levels of the existing account/client
  • Contribute to effective project-management
  • Effectively communicating with engineering teams in different Geographical locations to assure the success of the layout project

✅ Required Qualifications

  • 6 to 8 years of Semiconductor industry experience in Custom Mixed-Signal layout design
  • Bachelor’s degree in Electrical or Electronic Engineering or equivalent
  • Able to deliver Custom analog layouts independently from schematic to layout generation, estimating the area, optimizing floorplan, routing, and complete verification flows
  • Firsthand experience in critical analog layout design blocks such as Temperature sensor, Serdes, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc.
  • Good at LVS/DRC debugging skills and other verifications for lower technology nodes - 14nm FinFet and below
  • Good understanding of Matching, EM, ESD, Latch-Up, Shielding, Parasitic and short channel concepts
  • Familiar with EDA tools like Cadence VLE/VXL, PVS, Assura and Calibre DRC/LVS
  • Understanding layout effects on the circuit such as speed, capacitance, power, and area etc.
  • Ability to understand design constraints and implement high-quality layouts
  • Excellent communication
  • Responsible for timely execution with high quality of layout design

⭐ Preferred Qualifications

  • Multiple Tape out support experience and collaborating with cross functional teams
  • Good people skills and critical thinking abilities to resolve the issue technically and professionally
  • Multiple foundries experience

🛠️ Required Skills

  • Custom Mixed-Signal layout design
  • Analog layout design
  • Schematic to layout generation
  • Area estimation
  • Floorplan optimization
  • Routing
  • Verification flows
  • Temperature sensor
  • Serdes
  • PLL
  • ADC
  • DAC
  • LDO
  • Bandgap
  • Ref Generators
  • Charge Pump
  • Current Mirrors
  • Comparator
  • Differential Amplifier
  • LVS/DRC debugging
  • 14nm FinFet and below technology nodes
  • Matching
  • EM
  • ESD
  • Latch-Up
  • Shielding
  • Parasitic
  • Short channel concepts
  • Cadence VLE/VXL
  • PVS
  • Assura
  • Calibre DRC/LVS
  • Layout effects on speed, capacitance, power, area
  • Design constraints implementation
  • Tape out support
  • Cross-functional collaboration
  • People skills
  • Critical thinking
  • Communication
  • Leadership in planning, estimation, scheduling, delegation
  • Team guidance and review
  • Project management
  • Troubleshooting
  • Client query resolution

Locations

  • Hyderabad, India

Salary

Estimated Salary Rangemedium confidence

2,500,000 - 4,200,000 INR / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • Custom Mixed-Signal layout designintermediate
  • Analog layout designintermediate
  • Schematic to layout generationintermediate
  • Area estimationintermediate
  • Floorplan optimizationintermediate
  • Routingintermediate
  • Verification flowsintermediate
  • Temperature sensorintermediate
  • Serdesintermediate
  • PLLintermediate
  • ADCintermediate
  • DACintermediate
  • LDOintermediate
  • Bandgapintermediate
  • Ref Generatorsintermediate
  • Charge Pumpintermediate
  • Current Mirrorsintermediate
  • Comparatorintermediate
  • Differential Amplifierintermediate
  • LVS/DRC debuggingintermediate
  • 14nm FinFet and below technology nodesintermediate
  • Matchingintermediate
  • EMintermediate
  • ESDintermediate
  • Latch-Upintermediate
  • Shieldingintermediate
  • Parasiticintermediate
  • Short channel conceptsintermediate
  • Cadence VLE/VXLintermediate
  • PVSintermediate
  • Assuraintermediate
  • Calibre DRC/LVSintermediate
  • Layout effects on speed, capacitance, power, areaintermediate
  • Design constraints implementationintermediate
  • Tape out supportintermediate
  • Cross-functional collaborationintermediate
  • People skillsintermediate
  • Critical thinkingintermediate
  • Communicationintermediate
  • Leadership in planning, estimation, scheduling, delegationintermediate
  • Team guidance and reviewintermediate
  • Project managementintermediate
  • Troubleshootingintermediate
  • Client query resolutionintermediate

Required Qualifications

  • 6 to 8 years of Semiconductor industry experience in Custom Mixed-Signal layout design (experience)
  • Bachelor’s degree in Electrical or Electronic Engineering or equivalent (experience)
  • Able to deliver Custom analog layouts independently from schematic to layout generation, estimating the area, optimizing floorplan, routing, and complete verification flows (experience)
  • Firsthand experience in critical analog layout design blocks such as Temperature sensor, Serdes, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc. (experience)
  • Good at LVS/DRC debugging skills and other verifications for lower technology nodes - 14nm FinFet and below (experience)
  • Good understanding of Matching, EM, ESD, Latch-Up, Shielding, Parasitic and short channel concepts (experience)
  • Familiar with EDA tools like Cadence VLE/VXL, PVS, Assura and Calibre DRC/LVS (experience)
  • Understanding layout effects on the circuit such as speed, capacitance, power, and area etc. (experience)
  • Ability to understand design constraints and implement high-quality layouts (experience)
  • Excellent communication (experience)
  • Responsible for timely execution with high quality of layout design (experience)

Preferred Qualifications

  • Multiple Tape out support experience and collaborating with cross functional teams (experience)
  • Good people skills and critical thinking abilities to resolve the issue technically and professionally (experience)
  • Multiple foundries experience (experience)

Responsibilities

  • Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support
  • Perform layout verification like LVS/DRC/Antenna, EM, quality check and documentation
  • Responsible for on-time delivery of block-level/top-level layouts with acceptable quality
  • Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment
  • Guide junior team-members in their execution of Sub block-level layouts & review their work
  • Should have good experience in working with cross-functional team
  • Ensure standard processes and procedures are followed to resolve all client queries
  • Handle technical escalations through effective diagnosis and troubleshooting of client queries
  • Manage and resolve technical roadblocks/escalations to timely deliverable with high quality
  • Troubleshoot all client queries in a user-friendly, courteous, and professional manner
  • Offer alternative solutions to clients (where appropriate) with the objective of retaining customers' and clients' business
  • Build people capability to ensure operational excellence and maintain superior customer service levels of the existing account/client
  • Contribute to effective project-management
  • Effectively communicating with engineering teams in different Geographical locations to assure the success of the layout project

Target Your Resume for "Analog Layout Engineer" , Capgemini

Get personalized recommendations to optimize your resume specifically for Analog Layout Engineer. Takes only 15 seconds!

AI-powered keyword optimization
Skills matching & gap analysis
Experience alignment suggestions

Check Your ATS Score for "Analog Layout Engineer" , Capgemini

Find out how well your resume matches this job's requirements. Get comprehensive analysis including ATS compatibility, keyword matching, skill gaps, and personalized recommendations.

ATS compatibility check
Keyword optimization analysis
Skill matching & gap identification
Format & readability score

Tags & Categories

Engineering and RandD ServicesSoftware EngineeringExperienced ProfessionalsEngineering and RandD Services

Answer 10 quick questions to check your fit for Analog Layout Engineer @ Capgemini.

Quiz Challenge
10 Questions
~2 Minutes
Instant Score

Related Books and Jobs

No related jobs found at the moment.