Design Verification Engineer
Capgemini
Design Verification Engineer
Job Description
Design Verification Engineer
📋 Job Overview
The Design Verification Engineer at Capgemini Engineering leads a team in verifying IPs and SoCs to ensure first silicon success using coverage-driven methodologies. Responsibilities include defining verification strategies, developing test plans and benches, and focusing on functional and code coverage with assertions. This role offers opportunities to work on cutting-edge projects in a supportive, innovative environment with hybrid work options.
📍 Location: Bangalore
💼 Experience Level: Experienced Professionals
🏢 Business Unit: Engineering and RandD Services
🎯 Key Responsibilities
- Lead and manage a team of verification engineers
- Define strategies for verifying IPs and SoCs to ensure first silicon success
- Write test plans
- Develop test benches and test cases
- Use industry-standard methodologies like UVM/SystemVerilog
- Focus on functional coverage, code coverage, and assertions
✅ Required Qualifications
- 5-12 years of experience in verification, SoC, SystemVerilog, and UVM
- Experience verifying IPs and SoCs leading to first silicon success
- Experience managing and leading a team of verification engineers
- Experience in coverage-driven IP verification using industry standard methodologies and HVLs
- Experience defining verification strategy, writing test plans, developing test benches and test cases
- Experience with code coverage, functional coverage, and assertions
- Experience with GLS
- Experience in AMS and power-aware verification
⭐ Preferred Qualifications
- ARM based SoC verification experience
- Proficiency in one scripting language like Perl, C++, Python, Unix Make, or Unix Shell Scripts
🛠️ Required Skills
- SystemVerilog
- UVM
- SoC verification
- IP verification
- Coverage-driven verification
- HVLs
- Functional coverage
- Code coverage
- Assertions
- GLS
- AMS verification
- Power-aware verification
- Perl
- C++
- Python
- Unix Make
- Unix Shell Scripts
- Team leadership
- Verification strategy definition
- Test planning
- Test bench development
🎁 Benefits & Perks
- Hybrid work options
- Adaptable schedules for work-life balance
- Inclusive culture focused on growth, innovation, and excellence
- Continuous learning opportunities
- Certifications in emerging technologies like cloud and AI
Locations
- Bangalore, India
Salary
Estimated Salary Rangemedium confidence
2,500,000 - 4,200,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- SystemVerilogintermediate
- UVMintermediate
- SoC verificationintermediate
- IP verificationintermediate
- Coverage-driven verificationintermediate
- HVLsintermediate
- Functional coverageintermediate
- Code coverageintermediate
- Assertionsintermediate
- GLSintermediate
- AMS verificationintermediate
- Power-aware verificationintermediate
- Perlintermediate
- C++intermediate
- Pythonintermediate
- Unix Makeintermediate
- Unix Shell Scriptsintermediate
- Team leadershipintermediate
- Verification strategy definitionintermediate
- Test planningintermediate
- Test bench developmentintermediate
Required Qualifications
- 5-12 years of experience in verification, SoC, SystemVerilog, and UVM (experience)
- Experience verifying IPs and SoCs leading to first silicon success (experience)
- Experience managing and leading a team of verification engineers (experience)
- Experience in coverage-driven IP verification using industry standard methodologies and HVLs (experience)
- Experience defining verification strategy, writing test plans, developing test benches and test cases (experience)
- Experience with code coverage, functional coverage, and assertions (experience)
- Experience with GLS (experience)
- Experience in AMS and power-aware verification (experience)
Preferred Qualifications
- ARM based SoC verification experience (experience)
- Proficiency in one scripting language like Perl, C++, Python, Unix Make, or Unix Shell Scripts (experience)
Responsibilities
- Lead and manage a team of verification engineers
- Define strategies for verifying IPs and SoCs to ensure first silicon success
- Write test plans
- Develop test benches and test cases
- Use industry-standard methodologies like UVM/SystemVerilog
- Focus on functional coverage, code coverage, and assertions
Benefits
- general: Hybrid work options
- general: Adaptable schedules for work-life balance
- general: Inclusive culture focused on growth, innovation, and excellence
- general: Continuous learning opportunities
- general: Certifications in emerging technologies like cloud and AI
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Answer 10 quick questions to check your fit for Design Verification Engineer @ Capgemini.
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Design Verification Engineer
Capgemini
Design Verification Engineer
Job Description
Design Verification Engineer
📋 Job Overview
The Design Verification Engineer at Capgemini Engineering leads a team in verifying IPs and SoCs to ensure first silicon success using coverage-driven methodologies. Responsibilities include defining verification strategies, developing test plans and benches, and focusing on functional and code coverage with assertions. This role offers opportunities to work on cutting-edge projects in a supportive, innovative environment with hybrid work options.
📍 Location: Bangalore
💼 Experience Level: Experienced Professionals
🏢 Business Unit: Engineering and RandD Services
🎯 Key Responsibilities
- Lead and manage a team of verification engineers
- Define strategies for verifying IPs and SoCs to ensure first silicon success
- Write test plans
- Develop test benches and test cases
- Use industry-standard methodologies like UVM/SystemVerilog
- Focus on functional coverage, code coverage, and assertions
✅ Required Qualifications
- 5-12 years of experience in verification, SoC, SystemVerilog, and UVM
- Experience verifying IPs and SoCs leading to first silicon success
- Experience managing and leading a team of verification engineers
- Experience in coverage-driven IP verification using industry standard methodologies and HVLs
- Experience defining verification strategy, writing test plans, developing test benches and test cases
- Experience with code coverage, functional coverage, and assertions
- Experience with GLS
- Experience in AMS and power-aware verification
⭐ Preferred Qualifications
- ARM based SoC verification experience
- Proficiency in one scripting language like Perl, C++, Python, Unix Make, or Unix Shell Scripts
🛠️ Required Skills
- SystemVerilog
- UVM
- SoC verification
- IP verification
- Coverage-driven verification
- HVLs
- Functional coverage
- Code coverage
- Assertions
- GLS
- AMS verification
- Power-aware verification
- Perl
- C++
- Python
- Unix Make
- Unix Shell Scripts
- Team leadership
- Verification strategy definition
- Test planning
- Test bench development
🎁 Benefits & Perks
- Hybrid work options
- Adaptable schedules for work-life balance
- Inclusive culture focused on growth, innovation, and excellence
- Continuous learning opportunities
- Certifications in emerging technologies like cloud and AI
Locations
- Bangalore, India
Salary
Estimated Salary Rangemedium confidence
2,500,000 - 4,200,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- SystemVerilogintermediate
- UVMintermediate
- SoC verificationintermediate
- IP verificationintermediate
- Coverage-driven verificationintermediate
- HVLsintermediate
- Functional coverageintermediate
- Code coverageintermediate
- Assertionsintermediate
- GLSintermediate
- AMS verificationintermediate
- Power-aware verificationintermediate
- Perlintermediate
- C++intermediate
- Pythonintermediate
- Unix Makeintermediate
- Unix Shell Scriptsintermediate
- Team leadershipintermediate
- Verification strategy definitionintermediate
- Test planningintermediate
- Test bench developmentintermediate
Required Qualifications
- 5-12 years of experience in verification, SoC, SystemVerilog, and UVM (experience)
- Experience verifying IPs and SoCs leading to first silicon success (experience)
- Experience managing and leading a team of verification engineers (experience)
- Experience in coverage-driven IP verification using industry standard methodologies and HVLs (experience)
- Experience defining verification strategy, writing test plans, developing test benches and test cases (experience)
- Experience with code coverage, functional coverage, and assertions (experience)
- Experience with GLS (experience)
- Experience in AMS and power-aware verification (experience)
Preferred Qualifications
- ARM based SoC verification experience (experience)
- Proficiency in one scripting language like Perl, C++, Python, Unix Make, or Unix Shell Scripts (experience)
Responsibilities
- Lead and manage a team of verification engineers
- Define strategies for verifying IPs and SoCs to ensure first silicon success
- Write test plans
- Develop test benches and test cases
- Use industry-standard methodologies like UVM/SystemVerilog
- Focus on functional coverage, code coverage, and assertions
Benefits
- general: Hybrid work options
- general: Adaptable schedules for work-life balance
- general: Inclusive culture focused on growth, innovation, and excellence
- general: Continuous learning opportunities
- general: Certifications in emerging technologies like cloud and AI
Tags & Categories
Answer 10 quick questions to check your fit for Design Verification Engineer @ Capgemini.
10 Questions
~2 Minutes
Instant Score
Related Books and Jobs