DFT Engineer C2
Capgemini
DFT Engineer C2
Job Description
DFT Engineer C2
📋 Job Overview
The DFT Engineer C2 role at Capgemini Engineering involves designing and implementing Design for Test (DFT) solutions for semiconductor and hardware projects. You will collaborate with global teams to develop test strategies, perform DFT insertions, and ensure product reliability across innovative industries like automotive and robotics. This position offers opportunities to work on cutting-edge R&D, leveraging Capgemini's expertise in AI, cloud, and engineering services.
📍 Location: Bangalore
💼 Experience Level: Experienced Professionals
🏢 Business Unit: Engineering and RandD Services
🎯 Key Responsibilities
- Develop and implement DFT architectures including scan chains, BIST, and ATPG
- Collaborate with design teams to integrate testability features in RTL and gate-level designs
- Perform verification and validation of DFT implementations
- Analyze test coverage and debug failures to improve yield
- Support product bring-up and manufacturing test development
✅ Required Qualifications
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
- 3-5 years of experience in DFT engineering for ASIC/SoC design
- Proficiency in semiconductor testing methodologies
⭐ Preferred Qualifications
- Experience with advanced nodes (7nm or below)
- Knowledge of AI and machine learning applications in testing
- Familiarity with Capgemini's industry-specific solutions
🛠️ Required Skills
- DFT tools: Synopsys DFT Compiler, Mentor Tessent, Cadence Modus
- Languages: SystemVerilog, Verilog, TCL, Perl/Python scripting
- Methodologies: Scan insertion, ATPG, JTAG, MBIST, LBIST
- Standards: IEEE 1149.1, UVM for verification
- Soft skills: Problem-solving, teamwork, innovation mindset
🎁 Benefits & Perks
- Global career opportunities with 340,000 team members across 50+ countries
- Professional development in cutting-edge technologies like AI and cloud
- Diverse and inclusive work environment
- Impactful projects in innovative industries
- Competitive compensation and perks aligned with Capgemini's heritage
Locations
- Bangalore, India
Salary
2,500,000 - 4,200,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- DFT tools: Synopsys DFT Compiler, Mentor Tessent, Cadence Modusintermediate
- Languages: SystemVerilog, Verilog, TCL, Perl/Python scriptingintermediate
- Methodologies: Scan insertion, ATPG, JTAG, MBIST, LBISTintermediate
- Standards: IEEE 1149.1, UVM for verificationintermediate
- Soft skills: Problem-solving, teamwork, innovation mindsetintermediate
Required Qualifications
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field (experience)
- 3-5 years of experience in DFT engineering for ASIC/SoC design (experience)
- Proficiency in semiconductor testing methodologies (experience)
Preferred Qualifications
- Experience with advanced nodes (7nm or below) (experience)
- Knowledge of AI and machine learning applications in testing (experience)
- Familiarity with Capgemini's industry-specific solutions (experience)
Responsibilities
- Develop and implement DFT architectures including scan chains, BIST, and ATPG
- Collaborate with design teams to integrate testability features in RTL and gate-level designs
- Perform verification and validation of DFT implementations
- Analyze test coverage and debug failures to improve yield
- Support product bring-up and manufacturing test development
Benefits
- general: Global career opportunities with 340,000 team members across 50+ countries
- general: Professional development in cutting-edge technologies like AI and cloud
- general: Diverse and inclusive work environment
- general: Impactful projects in innovative industries
- general: Competitive compensation and perks aligned with Capgemini's heritage
Tags & Categories
Answer 10 quick questions to check your fit for DFT Engineer C2 @ Capgemini.
Related Books and Jobs
DFT Engineer C2
Capgemini
DFT Engineer C2
Job Description
DFT Engineer C2
📋 Job Overview
The DFT Engineer C2 role at Capgemini Engineering involves designing and implementing Design for Test (DFT) solutions for semiconductor and hardware projects. You will collaborate with global teams to develop test strategies, perform DFT insertions, and ensure product reliability across innovative industries like automotive and robotics. This position offers opportunities to work on cutting-edge R&D, leveraging Capgemini's expertise in AI, cloud, and engineering services.
📍 Location: Bangalore
💼 Experience Level: Experienced Professionals
🏢 Business Unit: Engineering and RandD Services
🎯 Key Responsibilities
- Develop and implement DFT architectures including scan chains, BIST, and ATPG
- Collaborate with design teams to integrate testability features in RTL and gate-level designs
- Perform verification and validation of DFT implementations
- Analyze test coverage and debug failures to improve yield
- Support product bring-up and manufacturing test development
✅ Required Qualifications
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
- 3-5 years of experience in DFT engineering for ASIC/SoC design
- Proficiency in semiconductor testing methodologies
⭐ Preferred Qualifications
- Experience with advanced nodes (7nm or below)
- Knowledge of AI and machine learning applications in testing
- Familiarity with Capgemini's industry-specific solutions
🛠️ Required Skills
- DFT tools: Synopsys DFT Compiler, Mentor Tessent, Cadence Modus
- Languages: SystemVerilog, Verilog, TCL, Perl/Python scripting
- Methodologies: Scan insertion, ATPG, JTAG, MBIST, LBIST
- Standards: IEEE 1149.1, UVM for verification
- Soft skills: Problem-solving, teamwork, innovation mindset
🎁 Benefits & Perks
- Global career opportunities with 340,000 team members across 50+ countries
- Professional development in cutting-edge technologies like AI and cloud
- Diverse and inclusive work environment
- Impactful projects in innovative industries
- Competitive compensation and perks aligned with Capgemini's heritage
Locations
- Bangalore, India
Salary
2,500,000 - 4,200,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- DFT tools: Synopsys DFT Compiler, Mentor Tessent, Cadence Modusintermediate
- Languages: SystemVerilog, Verilog, TCL, Perl/Python scriptingintermediate
- Methodologies: Scan insertion, ATPG, JTAG, MBIST, LBISTintermediate
- Standards: IEEE 1149.1, UVM for verificationintermediate
- Soft skills: Problem-solving, teamwork, innovation mindsetintermediate
Required Qualifications
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field (experience)
- 3-5 years of experience in DFT engineering for ASIC/SoC design (experience)
- Proficiency in semiconductor testing methodologies (experience)
Preferred Qualifications
- Experience with advanced nodes (7nm or below) (experience)
- Knowledge of AI and machine learning applications in testing (experience)
- Familiarity with Capgemini's industry-specific solutions (experience)
Responsibilities
- Develop and implement DFT architectures including scan chains, BIST, and ATPG
- Collaborate with design teams to integrate testability features in RTL and gate-level designs
- Perform verification and validation of DFT implementations
- Analyze test coverage and debug failures to improve yield
- Support product bring-up and manufacturing test development
Benefits
- general: Global career opportunities with 340,000 team members across 50+ countries
- general: Professional development in cutting-edge technologies like AI and cloud
- general: Diverse and inclusive work environment
- general: Impactful projects in innovative industries
- general: Competitive compensation and perks aligned with Capgemini's heritage
Tags & Categories
Answer 10 quick questions to check your fit for DFT Engineer C2 @ Capgemini.
Related Books and Jobs