Resume and JobRESUME AND JOB
Cisco logo

Hardware Engineer || FPGA/Design Verifcation,UVM,UMM || Exp - 7 to 11 Years

Cisco

Engineering Jobs

Hardware Engineer || FPGA/Design Verifcation,UVM,UMM || Exp - 7 to 11 Years

full-timePosted: Nov 13, 2025

Job Description

Job ID: 1451529

Meet the Team

We are part of the Hardware Platform Group, with our team specializing in FPGA verification. Our work spans both sophisticated data-path and challenging control-path FPGAs. The verification process includes crafting the DV architecture, test plan, and coverage plan, all the way through to final DV sign-off. We leverage industry-standard tools for simulation, linting, coverage, and assertions, incorporating various quality metrics to ensure a robust process. Our ultimate goal is to deliver bug-free RTL for first-pass success on the board. Additionally, we collaborate closely with our remote teams based in US and Italy.

Your Impact

* Lead and mentor a team of verification engineers, driving the development of robust test benches, coverage plans, and constrained random tests.
* Ensure high-quality and reliable FPGA/ASIC designs through sophisticated verification techniques and comprehensive debugging.
* Contribute to the adoption and evolution of ground breaking verification methodologies like UVM/VMM, improving team efficiency and performance.
* Partner with architects, logic designers, and software engineers to align on architecture, micro-architecture, and system-level requirements.
* Play a pivotal role in delivering next-generation, high-performance FPGA and ASIC products for Cisco’s networking solutions.
* Ensure product reliability and performance, strengthening Cisco’s reputation and customer trust in its hardware solutions.

Minimum Qualifications

* Bachelor's Degree / Master's Degree in Electrical or Computer Engineering with 7+ years of experience in design verification.
* Proficiency in OOPs, Verilog & System Verilog.
* Confirmed verification skills : FPGA, planning, problem solving, debug, adversarial testing and random testing
* Project based work experience with UVM/VMM methodologies.
* You will have experience with architecting the testplan & test bench.

Preferred Qualifications

* Hands on experience with Ethernet based protocols, PCIe, AXI, memory controllers, OTN etc. will be an added advantage.
* Familiarity with VCS simulation flow, knowledge of coverage & assertions is desirable.

Why Cisco? 

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. 

We are Cisco, and our power starts with you. 

Locations

  • Bangalore, India

Salary

3,136,700 - 4,574,100 INR / yearly

Skills Required

  • OOPsintermediate
  • Verilogintermediate
  • System Verilogintermediate
  • FPGA verificationintermediate
  • Planningintermediate
  • Problem solvingintermediate
  • Debugintermediate
  • Adversarial testingintermediate
  • Random testingintermediate
  • UVM/VMM methodologiesintermediate
  • Testplan & test bench architectingintermediate

Required Qualifications

  • Bachelor's Degree / Master's Degree in Electrical or Computer Engineering with 7+ years of experience in design verification. (experience)
  • Proficiency in OOPs, Verilog & System Verilog. (experience)
  • Confirmed verification skills : FPGA, planning, problem solving, debug, adversarial testing and random testing (experience)
  • Project based work experience with UVM/VMM methodologies. (experience)
  • You will have experience with architecting the testplan & test bench. (experience)

Preferred Qualifications

  • Hands on experience with Ethernet based protocols, PCIe, AXI, memory controllers, OTN etc. will be an added advantage. (experience)
  • Familiarity with VCS simulation flow, knowledge of coverage & assertions is desirable. (experience)

Responsibilities

  • Lead and mentor a team of verification engineers, driving the development of robust test benches, coverage plans, and constrained random tests.
  • Ensure high-quality and reliable FPGA/ASIC designs through sophisticated verification techniques and comprehensive debugging.
  • Contribute to the adoption and evolution of ground breaking verification methodologies like UVM/VMM, improving team efficiency and performance.
  • Partner with architects, logic designers, and software engineers to align on architecture, micro-architecture, and system-level requirements.
  • Play a pivotal role in delivering next-generation, high-performance FPGA and ASIC products for Cisco’s networking solutions.
  • Ensure product reliability and performance, strengthening Cisco’s reputation and customer trust in its hardware solutions.

Benefits

  • general: Worldwide network of doers and experts
  • general: Opportunities to grow and build are limitless
  • general: Work as a team, collaborating with empathy to make really big things happen on a global scale

Target Your Resume for "Hardware Engineer || FPGA/Design Verifcation,UVM,UMM || Exp - 7 to 11 Years" , Cisco

Get personalized recommendations to optimize your resume specifically for Hardware Engineer || FPGA/Design Verifcation,UVM,UMM || Exp - 7 to 11 Years. Takes only 15 seconds!

AI-powered keyword optimization
Skills matching & gap analysis
Experience alignment suggestions

Check Your ATS Score for "Hardware Engineer || FPGA/Design Verifcation,UVM,UMM || Exp - 7 to 11 Years" , Cisco

Find out how well your resume matches this job's requirements. Get comprehensive analysis including ATS compatibility, keyword matching, skill gaps, and personalized recommendations.

ATS compatibility check
Keyword optimization analysis
Skill matching & gap identification
Format & readability score

Answer 10 quick questions to check your fit for Hardware Engineer || FPGA/Design Verifcation,UVM,UMM || Exp - 7 to 11 Years @ Cisco.

Quiz Challenge
10 Questions
~2 Minutes
Instant Score

Related Books and Jobs

No related jobs found at the moment.

Cisco logo

Hardware Engineer || FPGA/Design Verifcation,UVM,UMM || Exp - 7 to 11 Years

Cisco

Engineering Jobs

Hardware Engineer || FPGA/Design Verifcation,UVM,UMM || Exp - 7 to 11 Years

full-timePosted: Nov 13, 2025

Job Description

Job ID: 1451529

Meet the Team

We are part of the Hardware Platform Group, with our team specializing in FPGA verification. Our work spans both sophisticated data-path and challenging control-path FPGAs. The verification process includes crafting the DV architecture, test plan, and coverage plan, all the way through to final DV sign-off. We leverage industry-standard tools for simulation, linting, coverage, and assertions, incorporating various quality metrics to ensure a robust process. Our ultimate goal is to deliver bug-free RTL for first-pass success on the board. Additionally, we collaborate closely with our remote teams based in US and Italy.

Your Impact

* Lead and mentor a team of verification engineers, driving the development of robust test benches, coverage plans, and constrained random tests.
* Ensure high-quality and reliable FPGA/ASIC designs through sophisticated verification techniques and comprehensive debugging.
* Contribute to the adoption and evolution of ground breaking verification methodologies like UVM/VMM, improving team efficiency and performance.
* Partner with architects, logic designers, and software engineers to align on architecture, micro-architecture, and system-level requirements.
* Play a pivotal role in delivering next-generation, high-performance FPGA and ASIC products for Cisco’s networking solutions.
* Ensure product reliability and performance, strengthening Cisco’s reputation and customer trust in its hardware solutions.

Minimum Qualifications

* Bachelor's Degree / Master's Degree in Electrical or Computer Engineering with 7+ years of experience in design verification.
* Proficiency in OOPs, Verilog & System Verilog.
* Confirmed verification skills : FPGA, planning, problem solving, debug, adversarial testing and random testing
* Project based work experience with UVM/VMM methodologies.
* You will have experience with architecting the testplan & test bench.

Preferred Qualifications

* Hands on experience with Ethernet based protocols, PCIe, AXI, memory controllers, OTN etc. will be an added advantage.
* Familiarity with VCS simulation flow, knowledge of coverage & assertions is desirable.

Why Cisco? 

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. 

We are Cisco, and our power starts with you. 

Locations

  • Bangalore, India

Salary

3,136,700 - 4,574,100 INR / yearly

Skills Required

  • OOPsintermediate
  • Verilogintermediate
  • System Verilogintermediate
  • FPGA verificationintermediate
  • Planningintermediate
  • Problem solvingintermediate
  • Debugintermediate
  • Adversarial testingintermediate
  • Random testingintermediate
  • UVM/VMM methodologiesintermediate
  • Testplan & test bench architectingintermediate

Required Qualifications

  • Bachelor's Degree / Master's Degree in Electrical or Computer Engineering with 7+ years of experience in design verification. (experience)
  • Proficiency in OOPs, Verilog & System Verilog. (experience)
  • Confirmed verification skills : FPGA, planning, problem solving, debug, adversarial testing and random testing (experience)
  • Project based work experience with UVM/VMM methodologies. (experience)
  • You will have experience with architecting the testplan & test bench. (experience)

Preferred Qualifications

  • Hands on experience with Ethernet based protocols, PCIe, AXI, memory controllers, OTN etc. will be an added advantage. (experience)
  • Familiarity with VCS simulation flow, knowledge of coverage & assertions is desirable. (experience)

Responsibilities

  • Lead and mentor a team of verification engineers, driving the development of robust test benches, coverage plans, and constrained random tests.
  • Ensure high-quality and reliable FPGA/ASIC designs through sophisticated verification techniques and comprehensive debugging.
  • Contribute to the adoption and evolution of ground breaking verification methodologies like UVM/VMM, improving team efficiency and performance.
  • Partner with architects, logic designers, and software engineers to align on architecture, micro-architecture, and system-level requirements.
  • Play a pivotal role in delivering next-generation, high-performance FPGA and ASIC products for Cisco’s networking solutions.
  • Ensure product reliability and performance, strengthening Cisco’s reputation and customer trust in its hardware solutions.

Benefits

  • general: Worldwide network of doers and experts
  • general: Opportunities to grow and build are limitless
  • general: Work as a team, collaborating with empathy to make really big things happen on a global scale

Target Your Resume for "Hardware Engineer || FPGA/Design Verifcation,UVM,UMM || Exp - 7 to 11 Years" , Cisco

Get personalized recommendations to optimize your resume specifically for Hardware Engineer || FPGA/Design Verifcation,UVM,UMM || Exp - 7 to 11 Years. Takes only 15 seconds!

AI-powered keyword optimization
Skills matching & gap analysis
Experience alignment suggestions

Check Your ATS Score for "Hardware Engineer || FPGA/Design Verifcation,UVM,UMM || Exp - 7 to 11 Years" , Cisco

Find out how well your resume matches this job's requirements. Get comprehensive analysis including ATS compatibility, keyword matching, skill gaps, and personalized recommendations.

ATS compatibility check
Keyword optimization analysis
Skill matching & gap identification
Format & readability score

Answer 10 quick questions to check your fit for Hardware Engineer || FPGA/Design Verifcation,UVM,UMM || Exp - 7 to 11 Years @ Cisco.

Quiz Challenge
10 Questions
~2 Minutes
Instant Score

Related Books and Jobs

No related jobs found at the moment.