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Senior Design Verification Engineer

Cisco

Engineering Jobs

Senior Design Verification Engineer

full-timePosted: Nov 11, 2025

Job Description

Job ID: 1445924

Meet the Team

Join our SiliconOne team in Serbia, specializing in ASIC functional verification for Cisco Silicon One chips—high-performance networking chips utilized by major data centers worldwide. Collaborate with us on functional verification using SystemVerilog/UVM, and take advantage of opportunities to engage in various development stages, from architectural discussions to emulation and simulation support. Collaborate with global teams, design and block owners, chiplet and full-chip owners as well as emulation, compiler, and software development teams. Our team blends experienced and energetic engineers, fostering collaboration and transparency in an environment built on trust.

Your Impact

  • Implementation of DV infrastructure for block, cluster, and TOP-level environments.
  • Maintaining existing DV environments and enhancing them.
  • Ensuring complete verification coverage through implementation and review of code and functional coverage.
  • Working closely with architects and designers to ensure verification completeness.
  • Supporting tests done with emulation.
  • Engage in tasks to prepare for post-silicon-validation.


Minimum Requirements:

  • 5+ years’ experience in digital logic design verification
  • Advanced knowledge of SystemVerilog and UVM
  • Advanced debug skills pre-silicon and in-lab

Preferred Requirements:

  • Scripting abilities
  • System integration knowledge (AMBA, PCIe. SPI, I2C, JTAG, CPU)
  • Basic SW knowledge (chop driver level)
  • Basic design knowledge

Why Cisco? 

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. 

We are Cisco, and our power starts with you. 

Locations

  • Belgrade, Serbia

Salary

54,300 - 73,800 EUR / yearly

Skills Required

  • SystemVerilogintermediate
  • UVMintermediate
  • Digital logic design verificationintermediate
  • Advanced debug skillsintermediate
  • Scriptingintermediate
  • System integration (AMBA, PCIe, SPI, I2C, JTAG, CPU)intermediate
  • Basic SW knowledgeintermediate
  • Basic design knowledgeintermediate

Required Qualifications

  • 5+ years’ experience in digital logic design verification (experience)
  • Advanced knowledge of SystemVerilog and UVM (experience)
  • Advanced debug skills pre-silicon and in-lab (experience)

Preferred Qualifications

  • Scripting abilities (experience)
  • System integration knowledge (AMBA, PCIe. SPI, I2C, JTAG, CPU) (experience)
  • Basic SW knowledge (chop driver level) (experience)
  • Basic design knowledge (experience)

Responsibilities

  • Implementation of DV infrastructure for block, cluster, and TOP-level environments.
  • Maintaining existing DV environments and enhancing them.
  • Ensuring complete verification coverage through implementation and review of code and functional coverage.
  • Working closely with architects and designers to ensure verification completeness.
  • Supporting tests done with emulation.
  • Engage in tasks to prepare for post-silicon-validation.

Benefits

  • general: Collaborate with global teams
  • general: Opportunities to grow and build
  • general: Work as a team with empathy
  • general: Worldwide network of doers and experts

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Cisco logo

Senior Design Verification Engineer

Cisco

Engineering Jobs

Senior Design Verification Engineer

full-timePosted: Nov 11, 2025

Job Description

Job ID: 1445924

Meet the Team

Join our SiliconOne team in Serbia, specializing in ASIC functional verification for Cisco Silicon One chips—high-performance networking chips utilized by major data centers worldwide. Collaborate with us on functional verification using SystemVerilog/UVM, and take advantage of opportunities to engage in various development stages, from architectural discussions to emulation and simulation support. Collaborate with global teams, design and block owners, chiplet and full-chip owners as well as emulation, compiler, and software development teams. Our team blends experienced and energetic engineers, fostering collaboration and transparency in an environment built on trust.

Your Impact

  • Implementation of DV infrastructure for block, cluster, and TOP-level environments.
  • Maintaining existing DV environments and enhancing them.
  • Ensuring complete verification coverage through implementation and review of code and functional coverage.
  • Working closely with architects and designers to ensure verification completeness.
  • Supporting tests done with emulation.
  • Engage in tasks to prepare for post-silicon-validation.


Minimum Requirements:

  • 5+ years’ experience in digital logic design verification
  • Advanced knowledge of SystemVerilog and UVM
  • Advanced debug skills pre-silicon and in-lab

Preferred Requirements:

  • Scripting abilities
  • System integration knowledge (AMBA, PCIe. SPI, I2C, JTAG, CPU)
  • Basic SW knowledge (chop driver level)
  • Basic design knowledge

Why Cisco? 

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. 

We are Cisco, and our power starts with you. 

Locations

  • Belgrade, Serbia

Salary

54,300 - 73,800 EUR / yearly

Skills Required

  • SystemVerilogintermediate
  • UVMintermediate
  • Digital logic design verificationintermediate
  • Advanced debug skillsintermediate
  • Scriptingintermediate
  • System integration (AMBA, PCIe, SPI, I2C, JTAG, CPU)intermediate
  • Basic SW knowledgeintermediate
  • Basic design knowledgeintermediate

Required Qualifications

  • 5+ years’ experience in digital logic design verification (experience)
  • Advanced knowledge of SystemVerilog and UVM (experience)
  • Advanced debug skills pre-silicon and in-lab (experience)

Preferred Qualifications

  • Scripting abilities (experience)
  • System integration knowledge (AMBA, PCIe. SPI, I2C, JTAG, CPU) (experience)
  • Basic SW knowledge (chop driver level) (experience)
  • Basic design knowledge (experience)

Responsibilities

  • Implementation of DV infrastructure for block, cluster, and TOP-level environments.
  • Maintaining existing DV environments and enhancing them.
  • Ensuring complete verification coverage through implementation and review of code and functional coverage.
  • Working closely with architects and designers to ensure verification completeness.
  • Supporting tests done with emulation.
  • Engage in tasks to prepare for post-silicon-validation.

Benefits

  • general: Collaborate with global teams
  • general: Opportunities to grow and build
  • general: Work as a team with empathy
  • general: Worldwide network of doers and experts

Target Your Resume for "Senior Design Verification Engineer" , Cisco

Get personalized recommendations to optimize your resume specifically for Senior Design Verification Engineer. Takes only 15 seconds!

AI-powered keyword optimization
Skills matching & gap analysis
Experience alignment suggestions

Check Your ATS Score for "Senior Design Verification Engineer" , Cisco

Find out how well your resume matches this job's requirements. Get comprehensive analysis including ATS compatibility, keyword matching, skill gaps, and personalized recommendations.

ATS compatibility check
Keyword optimization analysis
Skill matching & gap identification
Format & readability score

Answer 10 quick questions to check your fit for Senior Design Verification Engineer @ Cisco.

Quiz Challenge
10 Questions
~2 Minutes
Instant Score

Related Books and Jobs

No related jobs found at the moment.