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ASIC Engineer, IP Design, Silicon

Google

ASIC Engineer, IP Design, Silicon

Google logo

Google

full-time

Posted: October 8, 2025

Number of Vacancies: 1

Job Description

Google | Bengaluru, Karnataka, India. Minimum qualifications: Bachelor’s degree in Electrical/Computer Engineering or equivalent practical experience. 3 years of experience with Register-Transfer Level (RTL) design and integration using Verilog/System Verilog, microarchitecture and automation. Experience with RTL design using Verilog/System Verilog and microarchitecture. Experience with a scripting language like Python or Perl. Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Locations

  • Bengaluru, Karnataka, India

Salary

Estimated Salary Rangemedium confidence

30,000,000 - 50,000,000 INR / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • Register-Transfer Level (RTL) designintermediate (Hardware Design)
  • RTL integrationintermediate (Hardware Design)
  • Verilogintermediate (Hardware Description Language)
  • System Verilogintermediate (Hardware Description Language)
  • Microarchitectureintermediate (Hardware Design)
  • Automationintermediate (Scripting)
  • Pythonintermediate (Scripting)
  • Perlintermediate (Scripting)
  • Low power estimationadvanced (Hardware Design)
  • Timing closureadvanced (Hardware Design)
  • Synthesisadvanced (Hardware Design)
  • Lintadvanced (Verification)
  • CDCadvanced (Verification)
  • RDCadvanced (Verification)

Required Qualifications

  • Bachelor’s degree (degree in Electrical Engineering)
  • Bachelor’s degree (degree in Computer Engineering)
  • RTL design and integration (experience, 3 years)
  • Master's degree (degree in Computer Science)
  • Master's degree (degree in Electrical Engineering)
  • IP design (experience, 6 years)

Responsibilities

  • Define microarchitecture details, block diagram, data flow, pipelines, etc.
  • Perform RTL development (SystemVerilog), debug functional/performance simulations.
  • Perform RTL quality checks including Lint, CDC, Synthesis, UPF checks.
  • Participate in synthesis, timing/power estimation and FPGA/silicon bring-up.
  • Communicate and work with multi-disciplined and multi-site teams.

Benefits

  • Equal Opportunity: Google is proud to be an equal opportunity and affirmative action employer committed to building a workforce representative of the users we serve.

Target Your Resume for "ASIC Engineer, IP Design, Silicon" , Google

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Tags & Categories

ASICSiliconIP DesignRTLGoogleHardware EngineeringSilicon Design

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Google logo

ASIC Engineer, IP Design, Silicon

Google

ASIC Engineer, IP Design, Silicon

Google logo

Google

full-time

Posted: October 8, 2025

Number of Vacancies: 1

Job Description

Google | Bengaluru, Karnataka, India. Minimum qualifications: Bachelor’s degree in Electrical/Computer Engineering or equivalent practical experience. 3 years of experience with Register-Transfer Level (RTL) design and integration using Verilog/System Verilog, microarchitecture and automation. Experience with RTL design using Verilog/System Verilog and microarchitecture. Experience with a scripting language like Python or Perl. Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Locations

  • Bengaluru, Karnataka, India

Salary

Estimated Salary Rangemedium confidence

30,000,000 - 50,000,000 INR / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • Register-Transfer Level (RTL) designintermediate (Hardware Design)
  • RTL integrationintermediate (Hardware Design)
  • Verilogintermediate (Hardware Description Language)
  • System Verilogintermediate (Hardware Description Language)
  • Microarchitectureintermediate (Hardware Design)
  • Automationintermediate (Scripting)
  • Pythonintermediate (Scripting)
  • Perlintermediate (Scripting)
  • Low power estimationadvanced (Hardware Design)
  • Timing closureadvanced (Hardware Design)
  • Synthesisadvanced (Hardware Design)
  • Lintadvanced (Verification)
  • CDCadvanced (Verification)
  • RDCadvanced (Verification)

Required Qualifications

  • Bachelor’s degree (degree in Electrical Engineering)
  • Bachelor’s degree (degree in Computer Engineering)
  • RTL design and integration (experience, 3 years)
  • Master's degree (degree in Computer Science)
  • Master's degree (degree in Electrical Engineering)
  • IP design (experience, 6 years)

Responsibilities

  • Define microarchitecture details, block diagram, data flow, pipelines, etc.
  • Perform RTL development (SystemVerilog), debug functional/performance simulations.
  • Perform RTL quality checks including Lint, CDC, Synthesis, UPF checks.
  • Participate in synthesis, timing/power estimation and FPGA/silicon bring-up.
  • Communicate and work with multi-disciplined and multi-site teams.

Benefits

  • Equal Opportunity: Google is proud to be an equal opportunity and affirmative action employer committed to building a workforce representative of the users we serve.

Target Your Resume for "ASIC Engineer, IP Design, Silicon" , Google

Get personalized recommendations to optimize your resume specifically for ASIC Engineer, IP Design, Silicon. Takes only 15 seconds!

AI-powered keyword optimization
Skills matching & gap analysis
Experience alignment suggestions

Check Your ATS Score for "ASIC Engineer, IP Design, Silicon" , Google

Find out how well your resume matches this job's requirements. Get comprehensive analysis including ATS compatibility, keyword matching, skill gaps, and personalized recommendations.

ATS compatibility check
Keyword optimization analysis
Skill matching & gap identification
Format & readability score

Tags & Categories

ASICSiliconIP DesignRTLGoogleHardware EngineeringSilicon Design

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No related jobs found at the moment.