Intern - ASIC/FPGA Verification & Validation Engineer
Honeywell
Intern - ASIC/FPGA Verification & Validation Engineer
Job Description
Intern - ASIC/FPGA Verification & Validation Engineer
Location: Brno, Czech Republic (International opportunities available)
Workplace Type: Hybrid (part-time, flexible work-from-home model)
Overview
Join Honeywell's cutting-edge team in Brno as an Intern - ASIC/FPGA Verification & Validation Engineer. This part-time internship is designed for current university students passionate about hardware design and verification. You will contribute to innovative projects spanning Urban Air Mobility, Military Mission Computers, and Space applications. Honeywell, a Fortune 100 leader in aerospace and advanced technologies, offers a collaborative environment where interns gain hands-on experience with state-of-the-art ASIC and FPGA technologies. Work hybrid, balancing office collaboration in Brno with remote flexibility to fit your academic schedule.
Key Responsibilities
- Develop and execute verification testbenches using SystemVerilog and UVM methodologies for ASIC/FPGA designs.
- Perform validation testing on hardware prototypes, including simulation, emulation, and silicon bring-up.
- Analyze coverage metrics (functional, code, and toggle) to ensure comprehensive design verification.
- Collaborate with design and software teams to debug and resolve verification issues.
- Document test plans, results, and methodologies for team review and knowledge sharing.
- Support integration of verified designs into system-level applications for aerospace and defense products.
What Makes This Role Exciting
This internship provides unparalleled exposure to real-world, high-impact projects at the forefront of aerospace innovation. You'll work alongside industry experts on mission-critical systems that power urban air mobility vehicles, rugged military computers, and space exploration hardware. Gain practical skills in advanced verification tools, contribute to publishable work, and build a network within Honeywell's global engineering community. With mentorship from senior engineers, flexible hours, and hybrid work, this role accelerates your career while supporting your studies. Be part of shaping the future of technology that advances human progress.
Summary
As Intern - ASIC/FPGA Verification & Validation Engineer here at Honeywell in Brno, you will be part of a team working on new products that span from Urban Air Mobility through Military Mission Computer to Space design. This is a part-time opportunity for current university students with hybrid work from home model.
Locations
- Turanka 1387/100, , Brno, BM, CZ 62700
Salary
60,000 - 120,000 USD / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- SystemVerilog and UVMintermediate
- FPGA tools (Vivado, Quartus)intermediate
- Simulation and waveform analysis (ModelSim, Verdi)intermediate
- Digital design and RTL codingintermediate
- Coverage-driven verificationintermediate
- Scripting (Python, Perl, or Tcl)intermediate
- Strong attention to detailintermediate
- Team collaboration and communicationintermediate
- Basic knowledge of protocols (AXI, PCIe, Ethernet)intermediate
Required Qualifications
- Current enrollment in Bachelor's or Master's program in Electrical Engineering, Computer Engineering, Microelectronics, or related field (experience)
- Basic understanding of digital design principles and Verilog/SystemVerilog (experience)
- Familiarity with FPGA development flows (e.g., Xilinx Vivado or Intel Quartus) (experience)
- Hands-on experience with simulation tools like ModelSim or QuestaSim through coursework or projects (experience)
- Strong analytical and problem-solving skills (experience)
- Availability for part-time work (15-20 hours/week) during academic terms (experience)
Preferred Qualifications
- Prior internship or project experience in ASIC/FPGA verification (experience)
- Knowledge of UVM (Universal Verification Methodology) (experience)
- Exposure to scripting languages like Python or Tcl for automation (experience)
Responsibilities
- Create and maintain constrained-random verification environments using SystemVerilog/UVM
- Run regression suites and analyze failures to improve test coverage
- Validate FPGA bitstreams and ASIC netlists on emulation platforms
- Develop assertion-based verification (SVA) for critical design properties
- Collaborate with cross-functional teams to define verification requirements and plans
- Participate in design reviews and contribute to verification methodology enhancements
- Document and present verification results to stakeholders
Benefits
- general: Competitive hourly pay for interns
- general: Comprehensive health and wellness benefits
- general: 401(k) or local pension plan matching
- general: Professional development and mentorship programs
- general: Flexible hybrid work model supporting work-life balance
- general: Access to Honeywell University for training and certifications
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Answer 10 quick questions to check your fit for Intern - ASIC/FPGA Verification & Validation Engineer @ Honeywell.
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Intern - ASIC/FPGA Verification & Validation Engineer
Honeywell
Intern - ASIC/FPGA Verification & Validation Engineer
Job Description
Intern - ASIC/FPGA Verification & Validation Engineer
Location: Brno, Czech Republic (International opportunities available)
Workplace Type: Hybrid (part-time, flexible work-from-home model)
Overview
Join Honeywell's cutting-edge team in Brno as an Intern - ASIC/FPGA Verification & Validation Engineer. This part-time internship is designed for current university students passionate about hardware design and verification. You will contribute to innovative projects spanning Urban Air Mobility, Military Mission Computers, and Space applications. Honeywell, a Fortune 100 leader in aerospace and advanced technologies, offers a collaborative environment where interns gain hands-on experience with state-of-the-art ASIC and FPGA technologies. Work hybrid, balancing office collaboration in Brno with remote flexibility to fit your academic schedule.
Key Responsibilities
- Develop and execute verification testbenches using SystemVerilog and UVM methodologies for ASIC/FPGA designs.
- Perform validation testing on hardware prototypes, including simulation, emulation, and silicon bring-up.
- Analyze coverage metrics (functional, code, and toggle) to ensure comprehensive design verification.
- Collaborate with design and software teams to debug and resolve verification issues.
- Document test plans, results, and methodologies for team review and knowledge sharing.
- Support integration of verified designs into system-level applications for aerospace and defense products.
What Makes This Role Exciting
This internship provides unparalleled exposure to real-world, high-impact projects at the forefront of aerospace innovation. You'll work alongside industry experts on mission-critical systems that power urban air mobility vehicles, rugged military computers, and space exploration hardware. Gain practical skills in advanced verification tools, contribute to publishable work, and build a network within Honeywell's global engineering community. With mentorship from senior engineers, flexible hours, and hybrid work, this role accelerates your career while supporting your studies. Be part of shaping the future of technology that advances human progress.
Summary
As Intern - ASIC/FPGA Verification & Validation Engineer here at Honeywell in Brno, you will be part of a team working on new products that span from Urban Air Mobility through Military Mission Computer to Space design. This is a part-time opportunity for current university students with hybrid work from home model.
Locations
- Turanka 1387/100, , Brno, BM, CZ 62700
Salary
60,000 - 120,000 USD / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- SystemVerilog and UVMintermediate
- FPGA tools (Vivado, Quartus)intermediate
- Simulation and waveform analysis (ModelSim, Verdi)intermediate
- Digital design and RTL codingintermediate
- Coverage-driven verificationintermediate
- Scripting (Python, Perl, or Tcl)intermediate
- Strong attention to detailintermediate
- Team collaboration and communicationintermediate
- Basic knowledge of protocols (AXI, PCIe, Ethernet)intermediate
Required Qualifications
- Current enrollment in Bachelor's or Master's program in Electrical Engineering, Computer Engineering, Microelectronics, or related field (experience)
- Basic understanding of digital design principles and Verilog/SystemVerilog (experience)
- Familiarity with FPGA development flows (e.g., Xilinx Vivado or Intel Quartus) (experience)
- Hands-on experience with simulation tools like ModelSim or QuestaSim through coursework or projects (experience)
- Strong analytical and problem-solving skills (experience)
- Availability for part-time work (15-20 hours/week) during academic terms (experience)
Preferred Qualifications
- Prior internship or project experience in ASIC/FPGA verification (experience)
- Knowledge of UVM (Universal Verification Methodology) (experience)
- Exposure to scripting languages like Python or Tcl for automation (experience)
Responsibilities
- Create and maintain constrained-random verification environments using SystemVerilog/UVM
- Run regression suites and analyze failures to improve test coverage
- Validate FPGA bitstreams and ASIC netlists on emulation platforms
- Develop assertion-based verification (SVA) for critical design properties
- Collaborate with cross-functional teams to define verification requirements and plans
- Participate in design reviews and contribute to verification methodology enhancements
- Document and present verification results to stakeholders
Benefits
- general: Competitive hourly pay for interns
- general: Comprehensive health and wellness benefits
- general: 401(k) or local pension plan matching
- general: Professional development and mentorship programs
- general: Flexible hybrid work model supporting work-life balance
- general: Access to Honeywell University for training and certifications
Tags & Categories
Answer 10 quick questions to check your fit for Intern - ASIC/FPGA Verification & Validation Engineer @ Honeywell.
Related Books and Jobs