Junior ASIC/FPGA Verification & Validation Engineer
Honeywell
Junior ASIC/FPGA Verification & Validation Engineer
Job Description
Junior ASIC/FPGA Verification & Validation Engineer
Location: Brno, Czech Republic (International opportunities available)
Workplace: Hybrid
Overview
Join Honeywell's cutting-edge team in Brno as a Junior ASIC/FPGA Verification & Validation Engineer. You will contribute to innovative projects spanning Urban Air Mobility, Military Mission Computers, and Space design. Honeywell, a Fortune 100 leader in aerospace and advanced technologies, offers a dynamic environment where your expertise in ASIC and FPGA verification will drive mission-critical solutions. This hybrid role combines collaborative office innovation with flexible remote work, fostering professional growth in a global, high-impact setting.
Key Responsibilities
- Develop and execute comprehensive verification testbenches using SystemVerilog and UVM methodologies for ASIC and FPGA designs.
- Perform validation testing on hardware prototypes, including lab bring-up, functional testing, and performance characterization.
- Collaborate with design and systems engineering teams to define verification plans and coverage metrics.
- Debug complex issues using simulation tools, oscilloscopes, and logic analyzers to ensure design reliability.
- Contribute to formal design reviews and documentation of verification results for aerospace and defense standards.
- Support integration of verified IP blocks into larger SoC architectures for air, land, and space applications.
What Makes This Role Exciting
Be at the forefront of transformative technologies shaping the future of aviation and defense. Work on classified projects with real-world impact, from autonomous urban air vehicles to rugged space processors. Benefit from Honeywell's mentorship programs, state-of-the-art labs, and cross-functional teams. Enjoy career acceleration in a company investing heavily in R&D, with opportunities for international travel, certifications, and leadership roles. Thrive in a culture of innovation, inclusivity, and work-life balance, backed by comprehensive benefits and a commitment to employee success.
Summary
As Junior ASIC/FPGA Verification & Validation Engineer here at Honeywell in Brno, you will be part of a team working on new products that span from Urban Air Mobility through Military Mission Computer to Space design.
Locations
- Turanka 1387/100, , Brno, BM, CZ 62700
Salary
60,000 - 120,000 USD / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- SystemVerilog and UVM verification methodologyintermediate
- Verilog/VHDL hardware description languagesintermediate
- FPGA synthesis and implementation tools (Vivado, Quartus)intermediate
- Simulation tools (ModelSim, VCS, QuestaSim)intermediate
- Logic analyzers, oscilloscopes, and JTAG debuggingintermediate
- Python or Perl scripting for test automationintermediate
- Strong analytical and debugging skillsintermediate
- Understanding of digital design principles and timing analysisintermediate
- Excellent communication and teamwork abilitiesintermediate
- Familiarity with aerospace standards (e.g., MIL-STD, DO-254)intermediate
Required Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field (experience)
- 1-3 years of experience in ASIC/FPGA verification or validation (experience)
- Proficiency in HDLs such as Verilog or VHDL (experience)
- Hands-on experience with verification methodologies like UVM or constrained-random testing (experience)
- Familiarity with FPGA tools (Xilinx Vivado, Intel Quartus) and ASIC flows (experience)
- Strong problem-solving skills and attention to detail (experience)
Preferred Qualifications
- Master's degree in Electrical Engineering or related field (experience)
- Experience with DO-254 or other aerospace certification processes (experience)
- Knowledge of scripting languages (Python, Tcl) for automation (experience)
Responsibilities
- Design, implement, and maintain UVM-based verification environments for complex FPGA and ASIC designs
- Develop test plans, regression suites, and coverage-driven verification strategies to achieve 100% functional coverage
- Execute hardware validation on prototype boards, including signal integrity analysis and timing closure
- Analyze simulation waveforms and hardware debug logs to root-cause and resolve verification failures
- Collaborate with cross-functional teams to integrate verified designs into system-level architectures
- Document verification methodologies, results, and improvements for compliance with industry standards
- Support continuous integration pipelines and automate test flows for efficient development cycles
Benefits
- general: Competitive salary and performance-based bonuses
- general: Comprehensive health, dental, and vision insurance
- general: Retirement savings plan with company matching
- general: Professional development programs and tuition reimbursement
- general: Flexible hybrid work model with generous PTO
- general: Employee stock purchase plan and wellness initiatives
Tags & Categories
Answer 10 quick questions to check your fit for Junior ASIC/FPGA Verification & Validation Engineer @ Honeywell.
Related Books and Jobs
Junior ASIC/FPGA Verification & Validation Engineer
Honeywell
Junior ASIC/FPGA Verification & Validation Engineer
Job Description
Junior ASIC/FPGA Verification & Validation Engineer
Location: Brno, Czech Republic (International opportunities available)
Workplace: Hybrid
Overview
Join Honeywell's cutting-edge team in Brno as a Junior ASIC/FPGA Verification & Validation Engineer. You will contribute to innovative projects spanning Urban Air Mobility, Military Mission Computers, and Space design. Honeywell, a Fortune 100 leader in aerospace and advanced technologies, offers a dynamic environment where your expertise in ASIC and FPGA verification will drive mission-critical solutions. This hybrid role combines collaborative office innovation with flexible remote work, fostering professional growth in a global, high-impact setting.
Key Responsibilities
- Develop and execute comprehensive verification testbenches using SystemVerilog and UVM methodologies for ASIC and FPGA designs.
- Perform validation testing on hardware prototypes, including lab bring-up, functional testing, and performance characterization.
- Collaborate with design and systems engineering teams to define verification plans and coverage metrics.
- Debug complex issues using simulation tools, oscilloscopes, and logic analyzers to ensure design reliability.
- Contribute to formal design reviews and documentation of verification results for aerospace and defense standards.
- Support integration of verified IP blocks into larger SoC architectures for air, land, and space applications.
What Makes This Role Exciting
Be at the forefront of transformative technologies shaping the future of aviation and defense. Work on classified projects with real-world impact, from autonomous urban air vehicles to rugged space processors. Benefit from Honeywell's mentorship programs, state-of-the-art labs, and cross-functional teams. Enjoy career acceleration in a company investing heavily in R&D, with opportunities for international travel, certifications, and leadership roles. Thrive in a culture of innovation, inclusivity, and work-life balance, backed by comprehensive benefits and a commitment to employee success.
Summary
As Junior ASIC/FPGA Verification & Validation Engineer here at Honeywell in Brno, you will be part of a team working on new products that span from Urban Air Mobility through Military Mission Computer to Space design.
Locations
- Turanka 1387/100, , Brno, BM, CZ 62700
Salary
60,000 - 120,000 USD / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- SystemVerilog and UVM verification methodologyintermediate
- Verilog/VHDL hardware description languagesintermediate
- FPGA synthesis and implementation tools (Vivado, Quartus)intermediate
- Simulation tools (ModelSim, VCS, QuestaSim)intermediate
- Logic analyzers, oscilloscopes, and JTAG debuggingintermediate
- Python or Perl scripting for test automationintermediate
- Strong analytical and debugging skillsintermediate
- Understanding of digital design principles and timing analysisintermediate
- Excellent communication and teamwork abilitiesintermediate
- Familiarity with aerospace standards (e.g., MIL-STD, DO-254)intermediate
Required Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field (experience)
- 1-3 years of experience in ASIC/FPGA verification or validation (experience)
- Proficiency in HDLs such as Verilog or VHDL (experience)
- Hands-on experience with verification methodologies like UVM or constrained-random testing (experience)
- Familiarity with FPGA tools (Xilinx Vivado, Intel Quartus) and ASIC flows (experience)
- Strong problem-solving skills and attention to detail (experience)
Preferred Qualifications
- Master's degree in Electrical Engineering or related field (experience)
- Experience with DO-254 or other aerospace certification processes (experience)
- Knowledge of scripting languages (Python, Tcl) for automation (experience)
Responsibilities
- Design, implement, and maintain UVM-based verification environments for complex FPGA and ASIC designs
- Develop test plans, regression suites, and coverage-driven verification strategies to achieve 100% functional coverage
- Execute hardware validation on prototype boards, including signal integrity analysis and timing closure
- Analyze simulation waveforms and hardware debug logs to root-cause and resolve verification failures
- Collaborate with cross-functional teams to integrate verified designs into system-level architectures
- Document verification methodologies, results, and improvements for compliance with industry standards
- Support continuous integration pipelines and automate test flows for efficient development cycles
Benefits
- general: Competitive salary and performance-based bonuses
- general: Comprehensive health, dental, and vision insurance
- general: Retirement savings plan with company matching
- general: Professional development programs and tuition reimbursement
- general: Flexible hybrid work model with generous PTO
- general: Employee stock purchase plan and wellness initiatives
Tags & Categories
Answer 10 quick questions to check your fit for Junior ASIC/FPGA Verification & Validation Engineer @ Honeywell.
Related Books and Jobs