Hardware Verification Engineer
IBM
Hardware Verification Engineer
Job Description
Hardware Verification Engineer
📋 Job Overview
As a Hardware Verification Engineer at IBM, you will work on systems driving the quantum and AI revolutions, focusing on functional verification of server processors/SOC or ASICs. You will lead the development of verification environments, testbenches, and testcases, collaborating with design teams to ensure quality and coverage criteria are met.
📍 Location: BANGALORE, IN (Remote/Hybrid)
💼 Career Level: Professional
🎯 Key Responsibilities
- Leading the development of the verification environment, testbenches and writing testcases
- Develop skills in IBM Functional verification tools and methodologies
- Work with design and other key stakeholders in debugging and fixing logic design issues and deliver a quality design
- Work with development team to ensure coverage criteria is met
✅ Required Qualifications
- 9+ years of experience in Functional Verification of processors or ASICs
- 6+ years of experience in computer architecture, processor core design specifications, instruction set architecture, and logic verification
- Core architecture/micro-architecture verification
- Multi-processor cache coherency, Memory subsystem verification
- IO subsystem knowledge, protocols like PCIE/CXL, DDR, Flash, Ethernet
- AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification
- Gate level simulation and emulation
- Track record in leading team
- Clock domain crossing and reset domain crossing verification
- Knowledge of functional verification methodology - UVM/OVM/System Verilog/SystemC
- Knowledge of HDLs (Verilog, VHDL)
- Developed test-plans and test strategies for IP/unit/block level verification
- Good object-oriented programming skills in C/C++, scripting languages like Python/Perl
- Worked on multiple levels of verification (unit/element/sub-system/system level)
- Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow
- Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails
⭐ Preferred Qualifications
- Stress testing and ability to identify corner case scenarios
- Knowledge of high-speed SERDES and PHY Verification
- Good understanding of computer system architecture and microarchitecture
- Knowledge in IP Integration and SoC level verification
🛠️ Required Skills
- Functional Verification
- Computer architecture
- Processor core design specifications
- Instruction set architecture
- Logic verification
- Core architecture/micro-architecture verification
- Multi-processor cache coherency
- Memory subsystem verification
- IO subsystem
- PCIE/CXL
- DDR
- Flash
- Ethernet
- AXI/AHB/ACE/ACE-lite
- SoC fabric verification
- Gate level simulation
- Emulation
- Clock domain crossing
- Reset domain crossing
- UVM
- OVM
- System Verilog
- SystemC
- Verilog
- VHDL
- Test-plans
- Test strategies
- Object-oriented programming
- C/C++
- Python
- Perl
- Linux/Unix
- GIT
- Continuous Integration
- DevOps
- Testbench environment
- Debugging
- Triaging
- Stress testing
- Corner case scenarios
- High-speed SERDES
- PHY Verification
- Computer system architecture
- Microarchitecture
- IP Integration
- SoC level verification
🎁 Benefits & Perks
- Opportunity to learn and develop career
- Encouragement to be courageous and experiment
- Continuous trust and support in an inclusive environment
- Growth-minded culture with openness to feedback and learning
- Collaboration with colleagues for team-focused approach
- Equal-opportunity employment
Locations
- BANGALORE, IN, India (Remote)
Salary
Estimated Salary Rangemedium confidence
2,500,000 - 4,200,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- Functional Verificationintermediate
- Computer architectureintermediate
- Processor core design specificationsintermediate
- Instruction set architectureintermediate
- Logic verificationintermediate
- Core architecture/micro-architecture verificationintermediate
- Multi-processor cache coherencyintermediate
- Memory subsystem verificationintermediate
- IO subsystemintermediate
- PCIE/CXLintermediate
- DDRintermediate
- Flashintermediate
- Ethernetintermediate
- AXI/AHB/ACE/ACE-liteintermediate
- SoC fabric verificationintermediate
- Gate level simulationintermediate
- Emulationintermediate
- Clock domain crossingintermediate
- Reset domain crossingintermediate
- UVMintermediate
- OVMintermediate
- System Verilogintermediate
- SystemCintermediate
- Verilogintermediate
- VHDLintermediate
- Test-plansintermediate
- Test strategiesintermediate
- Object-oriented programmingintermediate
- C/C++intermediate
- Pythonintermediate
- Perlintermediate
- Linux/Unixintermediate
- GITintermediate
- Continuous Integrationintermediate
- DevOpsintermediate
- Testbench environmentintermediate
- Debuggingintermediate
- Triagingintermediate
- Stress testingintermediate
- Corner case scenariosintermediate
- High-speed SERDESintermediate
- PHY Verificationintermediate
- Computer system architectureintermediate
- Microarchitectureintermediate
- IP Integrationintermediate
- SoC level verificationintermediate
Required Qualifications
- 9+ years of experience in Functional Verification of processors or ASICs (experience)
- 6+ years of experience in computer architecture, processor core design specifications, instruction set architecture, and logic verification (experience)
- Core architecture/micro-architecture verification (experience)
- Multi-processor cache coherency, Memory subsystem verification (experience)
- IO subsystem knowledge, protocols like PCIE/CXL, DDR, Flash, Ethernet (experience)
- AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification (experience)
- Gate level simulation and emulation (experience)
- Track record in leading team (experience)
- Clock domain crossing and reset domain crossing verification (experience)
- Knowledge of functional verification methodology - UVM/OVM/System Verilog/SystemC (experience)
- Knowledge of HDLs (Verilog, VHDL) (experience)
- Developed test-plans and test strategies for IP/unit/block level verification (experience)
- Good object-oriented programming skills in C/C++, scripting languages like Python/Perl (experience)
- Worked on multiple levels of verification (unit/element/sub-system/system level) (experience)
- Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow (experience)
- Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails (experience)
Preferred Qualifications
- Stress testing and ability to identify corner case scenarios (experience)
- Knowledge of high-speed SERDES and PHY Verification (experience)
- Good understanding of computer system architecture and microarchitecture (experience)
- Knowledge in IP Integration and SoC level verification (experience)
Responsibilities
- Leading the development of the verification environment, testbenches and writing testcases
- Develop skills in IBM Functional verification tools and methodologies
- Work with design and other key stakeholders in debugging and fixing logic design issues and deliver a quality design
- Work with development team to ensure coverage criteria is met
Benefits
- general: Opportunity to learn and develop career
- general: Encouragement to be courageous and experiment
- general: Continuous trust and support in an inclusive environment
- general: Growth-minded culture with openness to feedback and learning
- general: Collaboration with colleagues for team-focused approach
- general: Equal-opportunity employment
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Answer 10 quick questions to check your fit for Hardware Verification Engineer @ IBM.
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Hardware Verification Engineer
IBM
Hardware Verification Engineer
Job Description
Hardware Verification Engineer
📋 Job Overview
As a Hardware Verification Engineer at IBM, you will work on systems driving the quantum and AI revolutions, focusing on functional verification of server processors/SOC or ASICs. You will lead the development of verification environments, testbenches, and testcases, collaborating with design teams to ensure quality and coverage criteria are met.
📍 Location: BANGALORE, IN (Remote/Hybrid)
💼 Career Level: Professional
🎯 Key Responsibilities
- Leading the development of the verification environment, testbenches and writing testcases
- Develop skills in IBM Functional verification tools and methodologies
- Work with design and other key stakeholders in debugging and fixing logic design issues and deliver a quality design
- Work with development team to ensure coverage criteria is met
✅ Required Qualifications
- 9+ years of experience in Functional Verification of processors or ASICs
- 6+ years of experience in computer architecture, processor core design specifications, instruction set architecture, and logic verification
- Core architecture/micro-architecture verification
- Multi-processor cache coherency, Memory subsystem verification
- IO subsystem knowledge, protocols like PCIE/CXL, DDR, Flash, Ethernet
- AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification
- Gate level simulation and emulation
- Track record in leading team
- Clock domain crossing and reset domain crossing verification
- Knowledge of functional verification methodology - UVM/OVM/System Verilog/SystemC
- Knowledge of HDLs (Verilog, VHDL)
- Developed test-plans and test strategies for IP/unit/block level verification
- Good object-oriented programming skills in C/C++, scripting languages like Python/Perl
- Worked on multiple levels of verification (unit/element/sub-system/system level)
- Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow
- Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails
⭐ Preferred Qualifications
- Stress testing and ability to identify corner case scenarios
- Knowledge of high-speed SERDES and PHY Verification
- Good understanding of computer system architecture and microarchitecture
- Knowledge in IP Integration and SoC level verification
🛠️ Required Skills
- Functional Verification
- Computer architecture
- Processor core design specifications
- Instruction set architecture
- Logic verification
- Core architecture/micro-architecture verification
- Multi-processor cache coherency
- Memory subsystem verification
- IO subsystem
- PCIE/CXL
- DDR
- Flash
- Ethernet
- AXI/AHB/ACE/ACE-lite
- SoC fabric verification
- Gate level simulation
- Emulation
- Clock domain crossing
- Reset domain crossing
- UVM
- OVM
- System Verilog
- SystemC
- Verilog
- VHDL
- Test-plans
- Test strategies
- Object-oriented programming
- C/C++
- Python
- Perl
- Linux/Unix
- GIT
- Continuous Integration
- DevOps
- Testbench environment
- Debugging
- Triaging
- Stress testing
- Corner case scenarios
- High-speed SERDES
- PHY Verification
- Computer system architecture
- Microarchitecture
- IP Integration
- SoC level verification
🎁 Benefits & Perks
- Opportunity to learn and develop career
- Encouragement to be courageous and experiment
- Continuous trust and support in an inclusive environment
- Growth-minded culture with openness to feedback and learning
- Collaboration with colleagues for team-focused approach
- Equal-opportunity employment
Locations
- BANGALORE, IN, India (Remote)
Salary
Estimated Salary Rangemedium confidence
2,500,000 - 4,200,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- Functional Verificationintermediate
- Computer architectureintermediate
- Processor core design specificationsintermediate
- Instruction set architectureintermediate
- Logic verificationintermediate
- Core architecture/micro-architecture verificationintermediate
- Multi-processor cache coherencyintermediate
- Memory subsystem verificationintermediate
- IO subsystemintermediate
- PCIE/CXLintermediate
- DDRintermediate
- Flashintermediate
- Ethernetintermediate
- AXI/AHB/ACE/ACE-liteintermediate
- SoC fabric verificationintermediate
- Gate level simulationintermediate
- Emulationintermediate
- Clock domain crossingintermediate
- Reset domain crossingintermediate
- UVMintermediate
- OVMintermediate
- System Verilogintermediate
- SystemCintermediate
- Verilogintermediate
- VHDLintermediate
- Test-plansintermediate
- Test strategiesintermediate
- Object-oriented programmingintermediate
- C/C++intermediate
- Pythonintermediate
- Perlintermediate
- Linux/Unixintermediate
- GITintermediate
- Continuous Integrationintermediate
- DevOpsintermediate
- Testbench environmentintermediate
- Debuggingintermediate
- Triagingintermediate
- Stress testingintermediate
- Corner case scenariosintermediate
- High-speed SERDESintermediate
- PHY Verificationintermediate
- Computer system architectureintermediate
- Microarchitectureintermediate
- IP Integrationintermediate
- SoC level verificationintermediate
Required Qualifications
- 9+ years of experience in Functional Verification of processors or ASICs (experience)
- 6+ years of experience in computer architecture, processor core design specifications, instruction set architecture, and logic verification (experience)
- Core architecture/micro-architecture verification (experience)
- Multi-processor cache coherency, Memory subsystem verification (experience)
- IO subsystem knowledge, protocols like PCIE/CXL, DDR, Flash, Ethernet (experience)
- AXI/AHB/ACE/ACE-lite fabric verification or any other SoC fabric verification (experience)
- Gate level simulation and emulation (experience)
- Track record in leading team (experience)
- Clock domain crossing and reset domain crossing verification (experience)
- Knowledge of functional verification methodology - UVM/OVM/System Verilog/SystemC (experience)
- Knowledge of HDLs (Verilog, VHDL) (experience)
- Developed test-plans and test strategies for IP/unit/block level verification (experience)
- Good object-oriented programming skills in C/C++, scripting languages like Python/Perl (experience)
- Worked on multiple levels of verification (unit/element/sub-system/system level) (experience)
- Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow (experience)
- Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails (experience)
Preferred Qualifications
- Stress testing and ability to identify corner case scenarios (experience)
- Knowledge of high-speed SERDES and PHY Verification (experience)
- Good understanding of computer system architecture and microarchitecture (experience)
- Knowledge in IP Integration and SoC level verification (experience)
Responsibilities
- Leading the development of the verification environment, testbenches and writing testcases
- Develop skills in IBM Functional verification tools and methodologies
- Work with design and other key stakeholders in debugging and fixing logic design issues and deliver a quality design
- Work with development team to ensure coverage criteria is met
Benefits
- general: Opportunity to learn and develop career
- general: Encouragement to be courageous and experiment
- general: Continuous trust and support in an inclusive environment
- general: Growth-minded culture with openness to feedback and learning
- general: Collaboration with colleagues for team-focused approach
- general: Equal-opportunity employment
Tags & Categories
Answer 10 quick questions to check your fit for Hardware Verification Engineer @ IBM.
10 Questions
~2 Minutes
Instant Score
Related Books and Jobs