Lead Logic Design - Core Load Store Unit
IBM
Lead Logic Design - Core Load Store Unit
Job Description
Lead Logic Design - Core Load Store Unit
📋 Job Overview
Lead the architecture, design, and development of the Processor Core Load-Store Execution unit for high-performance IBM Systems. Collaborate with various teams to develop features and ensure the design meets all functional, area, and timing goals. Mentor a team of engineers and represent as Logic Design Lead in global forums.
📍 Location: BANGALORE, IN (Remote/Hybrid)
💼 Career Level: Professional
🎯 Key Responsibilities
- Lead the architecture, design and development of Processor Core Load-Store Execution unit
- Architect and design Load and Store pipelines, D-Cache, Address Translation, Out of Order Execution
- Develop features and present proposed architecture in High level design discussions
- Estimate overall effort, silicon area, and wire usage for the feature
- Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams
- Signoff the Pre-silicon Design meeting all functional, area and timing goals
- Participate in post silicon lab bring-up and validation of the hardware
- Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums
✅ Required Qualifications
- 12 or more years of demonstrated experience in architecting and designing Load-Store Execution unit of CPU
- Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering
- Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA
- Experience with high frequency, instruction pipeline designs
- At least 1 generation of Processor Core silicon bring up experience
- In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs)
- Proficiency of RTL design with Verilog or VHDL
⭐ Preferred Qualifications
- Knowledge of instruction dispatch and Arithmetic units
- Knowledge of verification principles and coverage
- High-level knowledge of Linux operating system
- Knowledge of one object oriented language and scripting language
- Understanding of Agile development processes
- Experience with DevOps design methodologies and tools
🛠️ Required Skills
- Load-Store Execution unit design
- D-Cache implementation
- Address Translation
- Memory Consistency handling
- Store ordering
- Out of Order Execution
- Super Scalar architecture
- Multi-Threaded Core Architecture
- ISA knowledge
- High frequency instruction pipeline design
- Processor Core silicon bring up
- Microprocessor design understanding (x86, ARM, RISC-V)
- RTL design (Verilog, VHDL)
- Micro-architecture development
- Collaboration with Verification, DFT, Physical design, Timing, FW, SW teams
- Leadership and mentoring
- Global representation
🎁 Benefits & Perks
- Opportunity to learn and develop career
- Encouragement to be courageous and experiment
- Continuous trust and support in an inclusive environment
- Growth-minded culture with openness to feedback and learning
- Opportunity to collaborate and drive exceptional outcomes for customers
Locations
- BANGALORE, IN, India (Remote)
Salary
Estimated Salary Rangemedium confidence
2,500,000 - 4,200,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- Load-Store Execution unit designintermediate
- D-Cache implementationintermediate
- Address Translationintermediate
- Memory Consistency handlingintermediate
- Store orderingintermediate
- Out of Order Executionintermediate
- Super Scalar architectureintermediate
- Multi-Threaded Core Architectureintermediate
- ISA knowledgeintermediate
- High frequency instruction pipeline designintermediate
- Processor Core silicon bring upintermediate
- Microprocessor design understanding (x86, ARM, RISC-V)intermediate
- RTL design (Verilog, VHDL)intermediate
- Micro-architecture developmentintermediate
- Collaboration with Verification, DFT, Physical design, Timing, FW, SW teamsintermediate
- Leadership and mentoringintermediate
- Global representationintermediate
Required Qualifications
- 12 or more years of demonstrated experience in architecting and designing Load-Store Execution unit of CPU (experience)
- Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering (experience)
- Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA (experience)
- Experience with high frequency, instruction pipeline designs (experience)
- At least 1 generation of Processor Core silicon bring up experience (experience)
- In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) (experience)
- Proficiency of RTL design with Verilog or VHDL (experience)
Preferred Qualifications
- Knowledge of instruction dispatch and Arithmetic units (experience)
- Knowledge of verification principles and coverage (experience)
- High-level knowledge of Linux operating system (experience)
- Knowledge of one object oriented language and scripting language (experience)
- Understanding of Agile development processes (experience)
- Experience with DevOps design methodologies and tools (experience)
Responsibilities
- Lead the architecture, design and development of Processor Core Load-Store Execution unit
- Architect and design Load and Store pipelines, D-Cache, Address Translation, Out of Order Execution
- Develop features and present proposed architecture in High level design discussions
- Estimate overall effort, silicon area, and wire usage for the feature
- Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams
- Signoff the Pre-silicon Design meeting all functional, area and timing goals
- Participate in post silicon lab bring-up and validation of the hardware
- Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums
Benefits
- general: Opportunity to learn and develop career
- general: Encouragement to be courageous and experiment
- general: Continuous trust and support in an inclusive environment
- general: Growth-minded culture with openness to feedback and learning
- general: Opportunity to collaborate and drive exceptional outcomes for customers
Tags & Categories
Answer 10 quick questions to check your fit for Lead Logic Design - Core Load Store Unit @ IBM.
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Lead Logic Design - Core Load Store Unit
IBM
Lead Logic Design - Core Load Store Unit
Job Description
Lead Logic Design - Core Load Store Unit
📋 Job Overview
Lead the architecture, design, and development of the Processor Core Load-Store Execution unit for high-performance IBM Systems. Collaborate with various teams to develop features and ensure the design meets all functional, area, and timing goals. Mentor a team of engineers and represent as Logic Design Lead in global forums.
📍 Location: BANGALORE, IN (Remote/Hybrid)
💼 Career Level: Professional
🎯 Key Responsibilities
- Lead the architecture, design and development of Processor Core Load-Store Execution unit
- Architect and design Load and Store pipelines, D-Cache, Address Translation, Out of Order Execution
- Develop features and present proposed architecture in High level design discussions
- Estimate overall effort, silicon area, and wire usage for the feature
- Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams
- Signoff the Pre-silicon Design meeting all functional, area and timing goals
- Participate in post silicon lab bring-up and validation of the hardware
- Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums
✅ Required Qualifications
- 12 or more years of demonstrated experience in architecting and designing Load-Store Execution unit of CPU
- Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering
- Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA
- Experience with high frequency, instruction pipeline designs
- At least 1 generation of Processor Core silicon bring up experience
- In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs)
- Proficiency of RTL design with Verilog or VHDL
⭐ Preferred Qualifications
- Knowledge of instruction dispatch and Arithmetic units
- Knowledge of verification principles and coverage
- High-level knowledge of Linux operating system
- Knowledge of one object oriented language and scripting language
- Understanding of Agile development processes
- Experience with DevOps design methodologies and tools
🛠️ Required Skills
- Load-Store Execution unit design
- D-Cache implementation
- Address Translation
- Memory Consistency handling
- Store ordering
- Out of Order Execution
- Super Scalar architecture
- Multi-Threaded Core Architecture
- ISA knowledge
- High frequency instruction pipeline design
- Processor Core silicon bring up
- Microprocessor design understanding (x86, ARM, RISC-V)
- RTL design (Verilog, VHDL)
- Micro-architecture development
- Collaboration with Verification, DFT, Physical design, Timing, FW, SW teams
- Leadership and mentoring
- Global representation
🎁 Benefits & Perks
- Opportunity to learn and develop career
- Encouragement to be courageous and experiment
- Continuous trust and support in an inclusive environment
- Growth-minded culture with openness to feedback and learning
- Opportunity to collaborate and drive exceptional outcomes for customers
Locations
- BANGALORE, IN, India (Remote)
Salary
Estimated Salary Rangemedium confidence
2,500,000 - 4,200,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- Load-Store Execution unit designintermediate
- D-Cache implementationintermediate
- Address Translationintermediate
- Memory Consistency handlingintermediate
- Store orderingintermediate
- Out of Order Executionintermediate
- Super Scalar architectureintermediate
- Multi-Threaded Core Architectureintermediate
- ISA knowledgeintermediate
- High frequency instruction pipeline designintermediate
- Processor Core silicon bring upintermediate
- Microprocessor design understanding (x86, ARM, RISC-V)intermediate
- RTL design (Verilog, VHDL)intermediate
- Micro-architecture developmentintermediate
- Collaboration with Verification, DFT, Physical design, Timing, FW, SW teamsintermediate
- Leadership and mentoringintermediate
- Global representationintermediate
Required Qualifications
- 12 or more years of demonstrated experience in architecting and designing Load-Store Execution unit of CPU (experience)
- Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering (experience)
- Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA (experience)
- Experience with high frequency, instruction pipeline designs (experience)
- At least 1 generation of Processor Core silicon bring up experience (experience)
- In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) (experience)
- Proficiency of RTL design with Verilog or VHDL (experience)
Preferred Qualifications
- Knowledge of instruction dispatch and Arithmetic units (experience)
- Knowledge of verification principles and coverage (experience)
- High-level knowledge of Linux operating system (experience)
- Knowledge of one object oriented language and scripting language (experience)
- Understanding of Agile development processes (experience)
- Experience with DevOps design methodologies and tools (experience)
Responsibilities
- Lead the architecture, design and development of Processor Core Load-Store Execution unit
- Architect and design Load and Store pipelines, D-Cache, Address Translation, Out of Order Execution
- Develop features and present proposed architecture in High level design discussions
- Estimate overall effort, silicon area, and wire usage for the feature
- Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams
- Signoff the Pre-silicon Design meeting all functional, area and timing goals
- Participate in post silicon lab bring-up and validation of the hardware
- Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums
Benefits
- general: Opportunity to learn and develop career
- general: Encouragement to be courageous and experiment
- general: Continuous trust and support in an inclusive environment
- general: Growth-minded culture with openness to feedback and learning
- general: Opportunity to collaborate and drive exceptional outcomes for customers
Tags & Categories
Answer 10 quick questions to check your fit for Lead Logic Design - Core Load Store Unit @ IBM.
10 Questions
~2 Minutes
Instant Score
Related Books and Jobs