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Lead Logic Design Engineer - Memory Management Unit

IBM

Engineering Jobs

Lead Logic Design Engineer - Memory Management Unit

full-timePosted: Dec 11, 2025

Job Description

Lead Logic Design Engineer - Memory Management Unit

📋 Job Overview

As a Lead Logic Design Engineer - Memory Management Unit at IBM, you will lead the architecture, design, and development of the Memory Management Unit (MMU) for high-performance IBM systems. You will collaborate with various teams to enhance MMU features, sign off on pre-silicon designs, and participate in silicon bring-up and validation. This role involves leading and mentoring a team of engineers while representing IBM in global forums.

📍 Location: BANGALORE, IN (Remote/Hybrid)

💼 Career Level: Professional

🎯 Key Responsibilities

  • Lead the architecture, design, and development of processor MMU for high-performance IBM Systems
  • Develop micro-architecture, design RTL, and collaborate with Verification, DFT, Physical design, FW, SW teams to develop MMU feature enhancements
  • Sign off on the pre-silicon design that meets all functional, area, and timing goals
  • Participate in silicon bring-up and validation of the hardware
  • Lead a team of engineers, guide and mentor team members, and represent as Logic Design Lead in global forums
  • Estimate the overall effort to develop the feature
  • Estimate silicon area and wire usage for the feature

✅ Required Qualifications

  • 8 to 15 years of relevant experience
  • At least 1 generation of experience in memory management/memory controller delivery leadership
  • Experience with NuCA/NuMA (Non-uniform Cache/Memory architecture) architectures and implementations
  • Working knowledge of memory consistency, store ordering, weakly and strongly ordered memory
  • Good understanding of industry trends & advances in architecting high bandwidth memory solutions

🛠️ Required Skills

  • Micro-architecture development
  • RTL design
  • Collaboration with Verification, DFT, Physical design, FW, SW teams
  • Leadership and mentoring
  • Estimation of effort, silicon area, and wire usage
  • Knowledge of NuCA/NuMA architectures
  • Understanding of memory consistency, store ordering, weakly and strongly ordered memory
  • Familiarity with industry trends in high bandwidth memory solutions

🎁 Benefits & Perks

  • Opportunity to learn and develop yourself and your career
  • Encouragement to be courageous and experiment every day
  • Continuous trust and support in an environment where everyone can thrive
  • Growth-minded culture with openness to feedback and learning
  • Opportunity to collaborate with colleagues and drive exceptional outcomes for customers

Locations

  • BANGALORE, IN, India (Remote)

Salary

Estimated Salary Rangemedium confidence

2,500,000 - 4,200,000 INR / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • Micro-architecture developmentintermediate
  • RTL designintermediate
  • Collaboration with Verification, DFT, Physical design, FW, SW teamsintermediate
  • Leadership and mentoringintermediate
  • Estimation of effort, silicon area, and wire usageintermediate
  • Knowledge of NuCA/NuMA architecturesintermediate
  • Understanding of memory consistency, store ordering, weakly and strongly ordered memoryintermediate
  • Familiarity with industry trends in high bandwidth memory solutionsintermediate

Required Qualifications

  • 8 to 15 years of relevant experience (experience)
  • At least 1 generation of experience in memory management/memory controller delivery leadership (experience)
  • Experience with NuCA/NuMA (Non-uniform Cache/Memory architecture) architectures and implementations (experience)
  • Working knowledge of memory consistency, store ordering, weakly and strongly ordered memory (experience)
  • Good understanding of industry trends & advances in architecting high bandwidth memory solutions (experience)

Responsibilities

  • Lead the architecture, design, and development of processor MMU for high-performance IBM Systems
  • Develop micro-architecture, design RTL, and collaborate with Verification, DFT, Physical design, FW, SW teams to develop MMU feature enhancements
  • Sign off on the pre-silicon design that meets all functional, area, and timing goals
  • Participate in silicon bring-up and validation of the hardware
  • Lead a team of engineers, guide and mentor team members, and represent as Logic Design Lead in global forums
  • Estimate the overall effort to develop the feature
  • Estimate silicon area and wire usage for the feature

Benefits

  • general: Opportunity to learn and develop yourself and your career
  • general: Encouragement to be courageous and experiment every day
  • general: Continuous trust and support in an environment where everyone can thrive
  • general: Growth-minded culture with openness to feedback and learning
  • general: Opportunity to collaborate with colleagues and drive exceptional outcomes for customers

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IBM logo

Lead Logic Design Engineer - Memory Management Unit

IBM

Engineering Jobs

Lead Logic Design Engineer - Memory Management Unit

full-timePosted: Dec 11, 2025

Job Description

Lead Logic Design Engineer - Memory Management Unit

📋 Job Overview

As a Lead Logic Design Engineer - Memory Management Unit at IBM, you will lead the architecture, design, and development of the Memory Management Unit (MMU) for high-performance IBM systems. You will collaborate with various teams to enhance MMU features, sign off on pre-silicon designs, and participate in silicon bring-up and validation. This role involves leading and mentoring a team of engineers while representing IBM in global forums.

📍 Location: BANGALORE, IN (Remote/Hybrid)

💼 Career Level: Professional

🎯 Key Responsibilities

  • Lead the architecture, design, and development of processor MMU for high-performance IBM Systems
  • Develop micro-architecture, design RTL, and collaborate with Verification, DFT, Physical design, FW, SW teams to develop MMU feature enhancements
  • Sign off on the pre-silicon design that meets all functional, area, and timing goals
  • Participate in silicon bring-up and validation of the hardware
  • Lead a team of engineers, guide and mentor team members, and represent as Logic Design Lead in global forums
  • Estimate the overall effort to develop the feature
  • Estimate silicon area and wire usage for the feature

✅ Required Qualifications

  • 8 to 15 years of relevant experience
  • At least 1 generation of experience in memory management/memory controller delivery leadership
  • Experience with NuCA/NuMA (Non-uniform Cache/Memory architecture) architectures and implementations
  • Working knowledge of memory consistency, store ordering, weakly and strongly ordered memory
  • Good understanding of industry trends & advances in architecting high bandwidth memory solutions

🛠️ Required Skills

  • Micro-architecture development
  • RTL design
  • Collaboration with Verification, DFT, Physical design, FW, SW teams
  • Leadership and mentoring
  • Estimation of effort, silicon area, and wire usage
  • Knowledge of NuCA/NuMA architectures
  • Understanding of memory consistency, store ordering, weakly and strongly ordered memory
  • Familiarity with industry trends in high bandwidth memory solutions

🎁 Benefits & Perks

  • Opportunity to learn and develop yourself and your career
  • Encouragement to be courageous and experiment every day
  • Continuous trust and support in an environment where everyone can thrive
  • Growth-minded culture with openness to feedback and learning
  • Opportunity to collaborate with colleagues and drive exceptional outcomes for customers

Locations

  • BANGALORE, IN, India (Remote)

Salary

Estimated Salary Rangemedium confidence

2,500,000 - 4,200,000 INR / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • Micro-architecture developmentintermediate
  • RTL designintermediate
  • Collaboration with Verification, DFT, Physical design, FW, SW teamsintermediate
  • Leadership and mentoringintermediate
  • Estimation of effort, silicon area, and wire usageintermediate
  • Knowledge of NuCA/NuMA architecturesintermediate
  • Understanding of memory consistency, store ordering, weakly and strongly ordered memoryintermediate
  • Familiarity with industry trends in high bandwidth memory solutionsintermediate

Required Qualifications

  • 8 to 15 years of relevant experience (experience)
  • At least 1 generation of experience in memory management/memory controller delivery leadership (experience)
  • Experience with NuCA/NuMA (Non-uniform Cache/Memory architecture) architectures and implementations (experience)
  • Working knowledge of memory consistency, store ordering, weakly and strongly ordered memory (experience)
  • Good understanding of industry trends & advances in architecting high bandwidth memory solutions (experience)

Responsibilities

  • Lead the architecture, design, and development of processor MMU for high-performance IBM Systems
  • Develop micro-architecture, design RTL, and collaborate with Verification, DFT, Physical design, FW, SW teams to develop MMU feature enhancements
  • Sign off on the pre-silicon design that meets all functional, area, and timing goals
  • Participate in silicon bring-up and validation of the hardware
  • Lead a team of engineers, guide and mentor team members, and represent as Logic Design Lead in global forums
  • Estimate the overall effort to develop the feature
  • Estimate silicon area and wire usage for the feature

Benefits

  • general: Opportunity to learn and develop yourself and your career
  • general: Encouragement to be courageous and experiment every day
  • general: Continuous trust and support in an environment where everyone can thrive
  • general: Growth-minded culture with openness to feedback and learning
  • general: Opportunity to collaborate with colleagues and drive exceptional outcomes for customers

Target Your Resume for "Lead Logic Design Engineer - Memory Management Unit" , IBM

Get personalized recommendations to optimize your resume specifically for Lead Logic Design Engineer - Memory Management Unit. Takes only 15 seconds!

AI-powered keyword optimization
Skills matching & gap analysis
Experience alignment suggestions

Check Your ATS Score for "Lead Logic Design Engineer - Memory Management Unit" , IBM

Find out how well your resume matches this job's requirements. Get comprehensive analysis including ATS compatibility, keyword matching, skill gaps, and personalized recommendations.

ATS compatibility check
Keyword optimization analysis
Skill matching & gap identification
Format & readability score

Tags & Categories

Infrastructure & TechnologyInfrastructure & Technology

Answer 10 quick questions to check your fit for Lead Logic Design Engineer - Memory Management Unit @ IBM.

Quiz Challenge
10 Questions
~2 Minutes
Instant Score

Related Books and Jobs

No related jobs found at the moment.