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IP Design & Verification Engineer

Siemens

Engineering Jobs

IP Design & Verification Engineer

full-timePosted: Jan 13, 2026

Job Description

Looking for Siemens EDA ambassadors:

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the Increasingly complex world of chip, board, and system design.

Real trendsetters in every language.

Be an integral part of a team that is developing comprehensive verification IPs for interfaces such as PCIe Gen5/Gen6, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5.

This is your role.

  • Integrate and utilize Verification IPs (VIPs) for PCIe/CXL (Gen3/Gen4/Gen5/Gen6).
  • You will specify, implement, test and enhance these verification components for a wide range of end user applications.
  • You will work on technologies involving SV, UVM, Assertions, Coverage, Test plan, BFM design, debug, and logger.

We are not looking for superheroes, just super minds

  • You’re a Graduate / Post Graduate (Bachelors/Masters) in EEE) / ECE/VLSI from top reputed Engineering colleges with 2-5 years of significant experience in software development. Experience in EDA will be a phenomenal plus.
  • Practical experience with any of the following protocols: AMBA, PCI/PCIe, SAS, Ethernet, MIPI.
  • Experience in IP and SOC level verification.
  • Knowledge of verification methodologies such as Specman, SV, UVM, OVM, TLM, Assertion, Coverage, co-simulation, and co-verification.
  • Good interpersonal skills for working with external interfaces.
  • FPGA/Emulation experience is helpful.
  • Strong scripting and automation knowledge is a significant plus.

Join our Digital World!

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, colour, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform crucial job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

At Siemens, we are always challenging ourselves to build a better future. We have some of the most inquisitive minds working across the world, re-imagining the future and doing outstanding things.


#LI-EDA

#Onsite


Locations

  • Noida, Uttar Pradesh, India

Salary

Estimated Salary Rangemedium confidence

85,000 - 150,000 INR / yearly

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • Verification methodologies (SV, UVM, OVM, TLM, Assertions, Coverage)intermediate
  • Protocols (AMBA, PCI/PCIe, SAS, Ethernet, MIPI)intermediate
  • Scripting and automationintermediate
  • IP and SOC level verificationintermediate
  • BFM design, debug, loggerintermediate

Required Qualifications

  • Graduate / Post Graduate (Bachelors/Masters) in EEE/ECE/VLSI from top reputed Engineering colleges (experience)
  • 2-5 years of significant experience in software development (experience)
  • Experience in EDA (plus) (experience)

Responsibilities

  • Integrate and utilize Verification IPs (VIPs) for PCIe/CXL (Gen3/Gen4/Gen5/Gen6)
  • Specify, implement, test and enhance verification components

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Siemens logo

IP Design & Verification Engineer

Siemens

Engineering Jobs

IP Design & Verification Engineer

full-timePosted: Jan 13, 2026

Job Description

Looking for Siemens EDA ambassadors:

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the Increasingly complex world of chip, board, and system design.

Real trendsetters in every language.

Be an integral part of a team that is developing comprehensive verification IPs for interfaces such as PCIe Gen5/Gen6, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5.

This is your role.

  • Integrate and utilize Verification IPs (VIPs) for PCIe/CXL (Gen3/Gen4/Gen5/Gen6).
  • You will specify, implement, test and enhance these verification components for a wide range of end user applications.
  • You will work on technologies involving SV, UVM, Assertions, Coverage, Test plan, BFM design, debug, and logger.

We are not looking for superheroes, just super minds

  • You’re a Graduate / Post Graduate (Bachelors/Masters) in EEE) / ECE/VLSI from top reputed Engineering colleges with 2-5 years of significant experience in software development. Experience in EDA will be a phenomenal plus.
  • Practical experience with any of the following protocols: AMBA, PCI/PCIe, SAS, Ethernet, MIPI.
  • Experience in IP and SOC level verification.
  • Knowledge of verification methodologies such as Specman, SV, UVM, OVM, TLM, Assertion, Coverage, co-simulation, and co-verification.
  • Good interpersonal skills for working with external interfaces.
  • FPGA/Emulation experience is helpful.
  • Strong scripting and automation knowledge is a significant plus.

Join our Digital World!

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, colour, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform crucial job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

At Siemens, we are always challenging ourselves to build a better future. We have some of the most inquisitive minds working across the world, re-imagining the future and doing outstanding things.


#LI-EDA

#Onsite


Locations

  • Noida, Uttar Pradesh, India

Salary

Estimated Salary Rangemedium confidence

85,000 - 150,000 INR / yearly

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • Verification methodologies (SV, UVM, OVM, TLM, Assertions, Coverage)intermediate
  • Protocols (AMBA, PCI/PCIe, SAS, Ethernet, MIPI)intermediate
  • Scripting and automationintermediate
  • IP and SOC level verificationintermediate
  • BFM design, debug, loggerintermediate

Required Qualifications

  • Graduate / Post Graduate (Bachelors/Masters) in EEE/ECE/VLSI from top reputed Engineering colleges (experience)
  • 2-5 years of significant experience in software development (experience)
  • Experience in EDA (plus) (experience)

Responsibilities

  • Integrate and utilize Verification IPs (VIPs) for PCIe/CXL (Gen3/Gen4/Gen5/Gen6)
  • Specify, implement, test and enhance verification components

Target Your Resume for "IP Design & Verification Engineer" , Siemens

Get personalized recommendations to optimize your resume specifically for IP Design & Verification Engineer. Takes only 15 seconds!

AI-powered keyword optimization
Skills matching & gap analysis
Experience alignment suggestions

Check Your ATS Score for "IP Design & Verification Engineer" , Siemens

Find out how well your resume matches this job's requirements. Get comprehensive analysis including ATS compatibility, keyword matching, skill gaps, and personalized recommendations.

ATS compatibility check
Keyword optimization analysis
Skill matching & gap identification
Format & readability score

Answer 10 quick questions to check your fit for IP Design & Verification Engineer @ Siemens.

Quiz Challenge
10 Questions
~2 Minutes
Instant Score

Related Books and Jobs

No related jobs found at the moment.