Digital Design Engineer
Meta
Digital Design Engineer
Job Description
As a Digital Design Engineer at Meta Reality Labs, you will work with a industry-leading group of researchers and engineers, and use your digital design skills to implement and contribute to development and optimization of state of the art graphics algorithms. You will also support the Digital Silicon Architects developing and implementing the next generation custom and semi-custom mixed signal ICs to drive our industry leading wearable systems.
Locations
- Sunnyvale, CA, USA
Salary
Estimated Salary Rangemedium confidence
15,000,000 - 35,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- digital designintermediate
- graphics algorithms developmentintermediate
- graphics algorithms optimizationintermediate
- mixed signal IC developmentintermediate
- mixed signal IC implementationintermediate
- custom IC developmentintermediate
- semi-custom IC developmentintermediate
- wearable systems designintermediate
- collaboration with researchersintermediate
- collaboration with engineersintermediate
Required Qualifications
- Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta 2+ years of experience as a Digital Design Engineer Experience in RTL coding, synthesis and/or SoC Integration Experience in digital design Micro-architecture Experience with at least 1 procedural programming language C, C++, Python, etc Master's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience Experience with low power design and optimization to help meet the power requirements Experience in digital design Micro-architecture, SoC integration, ASIC architecture and graphics accelerators Experience in RTL implementation of Computer Graphics IP Experience with design synthesis and timing optimization (experience, 2 years)
Responsibilities
- Responsible for top-level or block level µArchitecture definition and RTL implementation Contribute to chip-level integration, verification plan development and verification Define timing constraints, run synthesis and static timing analysis Support the test program development, chip validation and chip life until production maturity Work with FPGA/Emulation engineers to perform early prototyping Support hand-off and integration of blocks into larger SOC environments
Tags & Categories
Digital Design Engineer
Meta
Digital Design Engineer
Job Description
As a Digital Design Engineer at Meta Reality Labs, you will work with a industry-leading group of researchers and engineers, and use your digital design skills to implement and contribute to development and optimization of state of the art graphics algorithms. You will also support the Digital Silicon Architects developing and implementing the next generation custom and semi-custom mixed signal ICs to drive our industry leading wearable systems.
Locations
- Sunnyvale, CA, USA
Salary
Estimated Salary Rangemedium confidence
15,000,000 - 35,000,000 INR / yearly
Source: ai estimated
* This is an estimated range based on market data and may vary based on experience and qualifications.
Skills Required
- digital designintermediate
- graphics algorithms developmentintermediate
- graphics algorithms optimizationintermediate
- mixed signal IC developmentintermediate
- mixed signal IC implementationintermediate
- custom IC developmentintermediate
- semi-custom IC developmentintermediate
- wearable systems designintermediate
- collaboration with researchersintermediate
- collaboration with engineersintermediate
Required Qualifications
- Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta 2+ years of experience as a Digital Design Engineer Experience in RTL coding, synthesis and/or SoC Integration Experience in digital design Micro-architecture Experience with at least 1 procedural programming language C, C++, Python, etc Master's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience Experience with low power design and optimization to help meet the power requirements Experience in digital design Micro-architecture, SoC integration, ASIC architecture and graphics accelerators Experience in RTL implementation of Computer Graphics IP Experience with design synthesis and timing optimization (experience, 2 years)
Responsibilities
- Responsible for top-level or block level µArchitecture definition and RTL implementation Contribute to chip-level integration, verification plan development and verification Define timing constraints, run synthesis and static timing analysis Support the test program development, chip validation and chip life until production maturity Work with FPGA/Emulation engineers to perform early prototyping Support hand-off and integration of blocks into larger SOC environments
Tags & Categories