This is a dual-role technical manager position including functional management and direct program leadership contribution. The split between program and functional duties will be approximately 80% program and 20% functional, on average. The manager's technical duties can include planning, program performance, addressing schedule and technical performance, direct technical contributor, technical leadership and tasking engineering staff. The manager's functional work includes direct supervision of their staff (~8-15 employees), providing objective directions to employees utilizing management guidelines & company policies while maintaining their current technical duties. Lead a team of engineers in management role. Administrative management responsibilities include staffing, performance and compensation management and career development. Conducts goal planning, performance evaluations merit budgeting Monthly 1:1 and Quarterly feedback with each employee Cultivate an inclusive and engaging workplace. Ensure employees' work life balance is appropriate. Supports staffing and recruiting needs as required Work with peers and leads in building strategies to address critical skills pipeline leveraging individual expertise and training opportunities. This would cover VHDL/FPGA, embedded Firmware, Digital board design and subsystems architecture. Develop appropriate technical training / work options; and improve team performance. Execute in a direct technical contributor or technical leadership role. This role involves overseeing/leading/collaborating on Digital designs involving FPGA, ASIC, Digital Subsystems Design and Architecture for teams involved in a diversity of design activities and applications. Partner with program management and engineering leads to establish and maintain methods for program execution, tracking metrics, communication and continuous improvement. Create, update, and maintain Digital engineering processes and procedures to ensure compliance with industry and company standards, requirements, and best practices Provides technical guidance related to process and training to staff Conducts weekly flow down meetings with assigned staff Attends weekly flow-down meetings with the Department Manager and monthly all manager meetings Bachelor's degree in Science, Technology, Engineering, or Mathematics (STEM) with 8+ years of relevant experience; Master of Science degree in STEM related field with 6+ years of relevant technical experience; PhD in STEM related field with 4+ years of relevant experience Experience working in a fast-paced environment where multiple projects are being developed and deployed simultaneously. Demonstrated success working well within a team environment and adapting quickly to change. Experience with industry standard FPGA design implementation tools for IP integration, PnR, CDC such as Xilinx Vivado, Intel Quartus, and QuestaSim. Working knowledge of full product life cycle (requirements, design, implementation and test) of FPGA Design and/or ASIC Design. Knowledge of System Verilog, Verilog and/or VHDL. Time management skills and a proven ability to follow through with commitments. Strong written, oral communication, and organizational skills. This position requires the applicant to be a U.S. Citizen Active TS/SCI security clearance per project requirements Master's degree in STEM, Engineering Leadership, or equivalent. 9+ years of experience in a multi-disciplined science/engineering environment. Strong leadership qualities, including excellent communication and collaboration, team engagement, and organizational skills. Familiarity with Xilinx and Intel FPGA technology. Familiarity with Agile methodologies (JIRA, Confluence). Experience with industry standard ASIC front-end design tools for synthesis, LEC, CDC. Experience with Verification IP integration and/or development. Experience with a coverage-driven verification methodology from planning through closure. Experience with STA constraints generation and timing closure. Experience as an IPT lead, functional lead, or leadership in the military