Automated place and route and physical verification knowledge is a plus. Circuit behavioral coding in Verilog, System Verilog or VHDL RTL Circuit synthesis, formal verification, and static timing using state-of-the-art digital ASIC design tools Developing verification plans based on requirements of the circuit and creating circuit functional test benches in RTL Generating manufacturing test vectors and manufacturing circuit test plan Help develop automated procedures to streamline digital design procedures Working knowledge of the front-end ASIC design flow from RTL to gates (RTL coding, simulation, synthesis, static timing analysis, logic equivalence, DFT insertion) Bachelor's degree in a technical area (BSEE or other Engineering discipline preferred) with 5 years of relevant experience (3 years with STEM MS; 1 year with STEM Phd) Experience with full product life cycle (requirements, design, implementation, test) of ASIC design Advanced Degree - either MS or PhD Current security clearance or eligibility Experience with chip level integration and ASIC chip lead - Strong design automation skills Experience in CAD design network, tool configuration, and data management Principal Digital ASIC Circuit Design Engineer Level:

Bachelor's degree in a technical area (BSEE or other Engineering discipline preferred) with 8 years of relevant experience (6 years with STEM related MS, 4 years with STEM related PhD) Experience with full product life cycle (requirements, design, implementation, test) of ASIC design Working knowledge of the front-end ASIC design flow from RTL to gates (RTL coding, simulation, synthesis, static timing analysis, logic equivalence, DFT insertion) Proficiency with current ASIC design tools for all phases described below:

Simulation - Mentor ModelSim, Cadence Excelium Incisive or Synopsys VCS - Synthesis - Synopsys Design Compiler, Cadence Genus or Cadence RTL Compiler - Static Timing - Synopsys Primetime or Cadence Tempus Advanced Degree - either MS or PhD Current security clearance Experience with chip level integration and ASIC chip lead - Strong design automation skills Experience in CAD design network, tool configuration, and data management