FPGA Architecture & Design Define FPGA architecture and logic design to support avionics computer functions Translate system and board-level requirements to detailed FPGA requirements and design specifications Collaborate with the Product Architect to partition system functionality between hardware, firmware and software HDL Coding & Implementation Develop synthesizable HDL code for FPGA-based designs Implement interfaces such as PCIe, SPI, I2C, UART, Ethernet and Serial Simulation, Verification and Validation Create comprehensive test benches and simulation environment to verify FPGA Perform functional, timing and synthesis-level simulations to ensure deterministic and reliable operation Support hardware-in-the-loop and system-level integration testing with embedded processors and avionics systems Participate in formal verification and validation activities Synthesis, Place & Route, and Timing Closure functionality Perform synthesis, implementation and timing closure using Vivado Optimize resource utilization, power consumption, and performance through iterative design and analysis Generate and review timing constraints to ensure reliable performance across all environmental conditions Basic qualifications for a Sr. Principal Engineer include a Bachelor's in Science, Technology, Engineering or Math (STEM) and at least 8 years of experience, a Master's Degree in STEM with 6 years of experience, or a PhD Degree with 3 years of experience Digital circuit design experience, including simulation & schematic capture through test and integration Prior hands-on prototyping and debug experience testing complex digital subsystems, such as complex circuit card development involving FPGAs, and/or embedded processors, and/or high-speed interfaces Experience with AMD FPGAs and the Vivado tool Experience with OVM/UVM Verification methodologies Demonstrated ability to translate system performance and operational specifications into hardware requirements, design, and test specifications Experience facilitating internal and customer collaboration to capture and enhance engineering artifacts Demonstrated experience with the full product life cycle (requirements, design, implementation, and test) Bachelor's or Master's degree in Electrical Engineering, Computer Engineering or similar engineering discipline