Responsible for research, design, and development for complex high speed digital designs. Support the implementation of digital FPGA hardware architecture and algorithms. Collaborate with Systems Engineering to ensure firmware design meets system level requirements, review designs and analysis. Bachelor's degree in electrical engineering or other STEM (Science, Technology, Engineering or Mathematics) discipline with 12 years of digital verification engineering experience using industry standard simulation tools; 10 years with an MS degree; 8 years with PhD. Must have hands on FPGA design experience with VHDL and/or Verilog within the past 3 years. Proficient in DSP algorithms and its implementation onto the FPGA using MATLAB and SimuLink. Experience with AMD/Xilinx and/or Intel/Altera SoC FPGAs. Experience with Electronic Design Automation (EDA) Tools:

Vivado, Quartus, and QuestaSim. Expertise in high-speed FPGA implementation such as AXI, DMA, PCIe, HSSI, DDR3, Ethernet, etc. Strong design skills in VHDL & Verilog. Experience in FPGA physical constraints and achieving timing closure. Experience in developing low-level FPGA requirements and developing verification procedures. Background in RF design is a plus. Experience with board or system level debug using test equipment such as oscilloscopes, logic and spectrum analyzers, RF signal generator, etc. Generation of complex test benches in Modelsim or Questasim to support formal Verification. Familiarity with the VxWorks RTOS, its architecture and development tools is a plus.