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ASIC Physical Design Intern - 2026

NVIDIA

Engineering Jobs

ASIC Physical Design Intern - 2026

full-timePosted: Oct 16, 2025

Job Description

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.With the continuous improvement of chip technology, design scale and performance/power ratio, the physical design of digital chips is facing outstanding challenges in high frequency, low power consumption and multiple applications. High efficiency, high quality of the implementation of the construction chip is the guarantee of the company's competitiveness. As an ASIC-PD intern at NVIDIA, you'll learn and work on the tasks from RTL frozen to tape out, include synthesis, formal verification, constraints definition, timing closure/sign off, study on the timing impact of process and related methodology work.What you'll be doing:Chip integration and netlist generation, cross-team collaboration to implement chip partitioning and floorplanSynthesis, RTL/netlist quality check, formal verification, function eco creationConstraints creation and validation, timing budget, work with ASIC team to analyze/resolve function timing issues, achieve all special timing closure, such as io, test, clock, async etc.Work in conjunction with PR engineers for chip implementation to achieve full chip timing closueDevelop and improve entire timing closure flow from frontend (pre-layout) to backend (post-layout), flow automation development for above areasMethodology in any of above areas.What we need to see:Currently pursuing a Master's or PhD degree within a relevant or related fieldStrong knowledge in IC designPassionate about technology research and IC backendSelf-driven, good leaning ability, good teamworkExcellent communication skill, proficient in English reading and writingWays to stand out from the crowd:Experience in IC backend implementationHand-on experience in EDA software from Synopsys (DC/PT/Formality), Cadence (RC compiler/LEC)Proficient user of Python or TCLNVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you!

Locations

  • Shanghai, China

Salary

Estimated Salary Rangemedium confidence

600,000 - 1,200,000 INR / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • chip integrationintermediate
  • netlist generationintermediate
  • chip partitioningintermediate
  • floorplanintermediate
  • synthesisintermediate
  • RTL/netlist quality checkintermediate
  • formal verificationintermediate
  • function eco creationintermediate
  • constraints creationintermediate
  • constraints validationintermediate
  • timing budgetintermediate
  • timing analysisintermediate
  • timing closureintermediate
  • io timingintermediate
  • test timingintermediate
  • clock timingintermediate
  • async timingintermediate
  • chip implementationintermediate
  • timing closure flow developmentintermediate
  • flow automation developmentintermediate
  • methodology developmentintermediate
  • cross-team collaborationintermediate
  • RTL designintermediate
  • ASIC designintermediate
  • physical designintermediate
  • process impact studyintermediate

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NVIDIA logo

ASIC Physical Design Intern - 2026

NVIDIA

Engineering Jobs

ASIC Physical Design Intern - 2026

full-timePosted: Oct 16, 2025

Job Description

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.With the continuous improvement of chip technology, design scale and performance/power ratio, the physical design of digital chips is facing outstanding challenges in high frequency, low power consumption and multiple applications. High efficiency, high quality of the implementation of the construction chip is the guarantee of the company's competitiveness. As an ASIC-PD intern at NVIDIA, you'll learn and work on the tasks from RTL frozen to tape out, include synthesis, formal verification, constraints definition, timing closure/sign off, study on the timing impact of process and related methodology work.What you'll be doing:Chip integration and netlist generation, cross-team collaboration to implement chip partitioning and floorplanSynthesis, RTL/netlist quality check, formal verification, function eco creationConstraints creation and validation, timing budget, work with ASIC team to analyze/resolve function timing issues, achieve all special timing closure, such as io, test, clock, async etc.Work in conjunction with PR engineers for chip implementation to achieve full chip timing closueDevelop and improve entire timing closure flow from frontend (pre-layout) to backend (post-layout), flow automation development for above areasMethodology in any of above areas.What we need to see:Currently pursuing a Master's or PhD degree within a relevant or related fieldStrong knowledge in IC designPassionate about technology research and IC backendSelf-driven, good leaning ability, good teamworkExcellent communication skill, proficient in English reading and writingWays to stand out from the crowd:Experience in IC backend implementationHand-on experience in EDA software from Synopsys (DC/PT/Formality), Cadence (RC compiler/LEC)Proficient user of Python or TCLNVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you!

Locations

  • Shanghai, China

Salary

Estimated Salary Rangemedium confidence

600,000 - 1,200,000 INR / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • chip integrationintermediate
  • netlist generationintermediate
  • chip partitioningintermediate
  • floorplanintermediate
  • synthesisintermediate
  • RTL/netlist quality checkintermediate
  • formal verificationintermediate
  • function eco creationintermediate
  • constraints creationintermediate
  • constraints validationintermediate
  • timing budgetintermediate
  • timing analysisintermediate
  • timing closureintermediate
  • io timingintermediate
  • test timingintermediate
  • clock timingintermediate
  • async timingintermediate
  • chip implementationintermediate
  • timing closure flow developmentintermediate
  • flow automation developmentintermediate
  • methodology developmentintermediate
  • cross-team collaborationintermediate
  • RTL designintermediate
  • ASIC designintermediate
  • physical designintermediate
  • process impact studyintermediate

Target Your Resume for "ASIC Physical Design Intern - 2026" , NVIDIA

Get personalized recommendations to optimize your resume specifically for ASIC Physical Design Intern - 2026. Takes only 15 seconds!

AI-powered keyword optimization
Skills matching & gap analysis
Experience alignment suggestions

Check Your ATS Score for "ASIC Physical Design Intern - 2026" , NVIDIA

Find out how well your resume matches this job's requirements. Get comprehensive analysis including ATS compatibility, keyword matching, skill gaps, and personalized recommendations.

ATS compatibility check
Keyword optimization analysis
Skill matching & gap identification
Format & readability score

Tags & Categories

China

Answer 10 quick questions to check your fit for ASIC Physical Design Intern - 2026 @ NVIDIA.

Quiz Challenge
10 Questions
~2 Minutes
Instant Score

Related Books and Jobs

No related jobs found at the moment.