NVIDIA has revolutionized computer graphics, PC gaming, and accelerated computing for over 25 years. It's a remarkable tradition of inventiveness driven by outstanding technology—and exceptional individuals. Right now, we are demonstrating the boundless capabilities of AI to build the forthcoming age of computing. A time where our GPU functions as the central intelligence of computers, robots, and autonomous vehicles capable of comprehending the environment. Doing what’s never been done before takes vision, innovation, and the world’s best talent. Joining the ranks of NVIDIANs means being part of a diverse and supportive setting that encourages everyone to strive for excellence. Join our team and discover how you can build a lasting influence on the world.NVIDIA is looking for a best-in-class Chiplet Physical Design Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in crafting our groundbreaking and innovating chips, enjoy working in a significant, growing and highly professional environment where you make a significant impact in a technology-focused company.What you'll be doing:Be part of a cross-business-unit team and own the high-speed IP integration.Build a Chiplet floorplan layout design from early assembly/planning through implementation and signoff.Work closely with partition owners and Full Chip STA engineers to assure high quality and timely convergence.Define and implement efficient, high-quality Chiplet level physical design tools, flows, and methodologies.Gain hands-on experience implementing the partition-level BE design (RTL2GDS).What we need to see:Great teammateBSEE / MSEE or equivalent experience.8+ years experience in physical designExperience in unit and top-level floor planning, bump and RDL layout, full-chip clock tree, power grid planning, and DRC/LVS.In depth knowledge of physical design flows and methodologies (PNR, STA, physical verification).Deep understanding of all aspects of Physical construction and Integration.Knowledge in Physical Design Verification methodology LVS/DRC.Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.)NVIDIA has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry!Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.You will also be eligible for equity and benefits.Applications for this job will be accepted at least until November 7, 2025.NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.