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Digital Circuit Design Intern - 2026

NVIDIA

Engineering Jobs

Digital Circuit Design Intern - 2026

full-timePosted: Nov 4, 2025

Job Description

We are looking for a Digital Circuit Design Intern. As a member of our Mixed-Signal high-speed I/O SerDes group, you'll be working on NVDIA's latest ground breaking technology that enables and accelerates gaming, artificial intelligence, deep learning, and autonomous driving. Your design will be consumed by standard as well as industry-leading proprietary high-speed protocols, and will serve as one of the key IPs in many complex SoC. You'll work closely with analog designers and system architects to independently come up with micro-architecture specification and refine adaptation algorithms. You'll then implement the RTL in SystemVerilog, define test cases that will deeply verify the design and carry out test creations. Next is to define and build constraints for synthesis and drive for timing closure. In addition to RTL design, you'll need to understand the analog schematics and write SystemVerilog models that collects the functionality of those circuits in the most precise way.What you'll be doing:Be actively involve in developing mixed-signal chips .Plan the specification, evaluate the PPA of algorithms, design the digital circuits such as filters and analog calibration circuitsVerify the analog and digital design using direct test and random testPerform the frond-end design flows (Lint/CDC/Synthesis/DFT/LEC/STA) and co-work with back-end team to chip tape-outHelp in silicon bring-up and fine-tune performanceWhat we need to see:Pursuing Master / PhD in Electrical Engineering.Solid understanding or experience in high-speed SerDes I/O digital design, knowledge at protocol level (Ethernet, PCIE) preferred.Have a deep understanding of Verilog or SystemVerilog, logic design and circuit modeling in RTL for mixed-signal blocks; Experience with industry standard verification methodologies, such as UVM.Knowledge with custom digital circuit design and adaptation algorithms, such as FFE, DFE, CTLE, CDR, and offset cancellation.Familiar with static timing tools and formal verification tools.Have a strong background in Perl and Python scripting; If you have a background in computer architecture and deep learning, this is a plus.With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the most desirable employers in the world. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.

Locations

  • Hsinchu, Taiwan

Salary

Estimated Salary Rangemedium confidence

600,000 - 1,200,000 INR / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • Digital Circuit Designintermediate
  • SystemVerilogintermediate
  • RTL Designintermediate
  • Test Case Definitionintermediate
  • Synthesis Constraintsintermediate
  • Timing Closureintermediate
  • Analog Schematics Understandingintermediate
  • SystemVerilog Modelingintermediate
  • Mixed-Signal Chip Developmentintermediate
  • PPA Evaluationintermediate
  • Filter Designintermediate
  • Analog Calibration Circuitsintermediate
  • Design Verificationintermediate
  • Direct Testintermediate
  • Random Testintermediate
  • Front-End Design Flowsintermediate
  • Lintintermediate
  • CDCintermediate
  • Synthesisintermediate
  • DFTintermediate
  • LECintermediate
  • STAintermediate
  • Silicon Bring-Upintermediate
  • Performance Fine-Tuningintermediate
  • High-Speed SerDes I/O Designintermediate
  • Protocol Knowledge (Ethernet, PCIE)intermediate
  • Verilogintermediate
  • Logic Designintermediate
  • Circuit Modelingintermediate
  • UVMintermediate
  • Custom Digital Circuit Designintermediate
  • Adaptation Algorithmsintermediate
  • FFEintermediate
  • DFEintermediate
  • CTLEintermediate
  • CDRintermediate
  • Offset Cancellationintermediate
  • Static Timing Toolsintermediate
  • Formal Verificationintermediate

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NVIDIA logo

Digital Circuit Design Intern - 2026

NVIDIA

Engineering Jobs

Digital Circuit Design Intern - 2026

full-timePosted: Nov 4, 2025

Job Description

We are looking for a Digital Circuit Design Intern. As a member of our Mixed-Signal high-speed I/O SerDes group, you'll be working on NVDIA's latest ground breaking technology that enables and accelerates gaming, artificial intelligence, deep learning, and autonomous driving. Your design will be consumed by standard as well as industry-leading proprietary high-speed protocols, and will serve as one of the key IPs in many complex SoC. You'll work closely with analog designers and system architects to independently come up with micro-architecture specification and refine adaptation algorithms. You'll then implement the RTL in SystemVerilog, define test cases that will deeply verify the design and carry out test creations. Next is to define and build constraints for synthesis and drive for timing closure. In addition to RTL design, you'll need to understand the analog schematics and write SystemVerilog models that collects the functionality of those circuits in the most precise way.What you'll be doing:Be actively involve in developing mixed-signal chips .Plan the specification, evaluate the PPA of algorithms, design the digital circuits such as filters and analog calibration circuitsVerify the analog and digital design using direct test and random testPerform the frond-end design flows (Lint/CDC/Synthesis/DFT/LEC/STA) and co-work with back-end team to chip tape-outHelp in silicon bring-up and fine-tune performanceWhat we need to see:Pursuing Master / PhD in Electrical Engineering.Solid understanding or experience in high-speed SerDes I/O digital design, knowledge at protocol level (Ethernet, PCIE) preferred.Have a deep understanding of Verilog or SystemVerilog, logic design and circuit modeling in RTL for mixed-signal blocks; Experience with industry standard verification methodologies, such as UVM.Knowledge with custom digital circuit design and adaptation algorithms, such as FFE, DFE, CTLE, CDR, and offset cancellation.Familiar with static timing tools and formal verification tools.Have a strong background in Perl and Python scripting; If you have a background in computer architecture and deep learning, this is a plus.With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the most desirable employers in the world. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.

Locations

  • Hsinchu, Taiwan

Salary

Estimated Salary Rangemedium confidence

600,000 - 1,200,000 INR / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • Digital Circuit Designintermediate
  • SystemVerilogintermediate
  • RTL Designintermediate
  • Test Case Definitionintermediate
  • Synthesis Constraintsintermediate
  • Timing Closureintermediate
  • Analog Schematics Understandingintermediate
  • SystemVerilog Modelingintermediate
  • Mixed-Signal Chip Developmentintermediate
  • PPA Evaluationintermediate
  • Filter Designintermediate
  • Analog Calibration Circuitsintermediate
  • Design Verificationintermediate
  • Direct Testintermediate
  • Random Testintermediate
  • Front-End Design Flowsintermediate
  • Lintintermediate
  • CDCintermediate
  • Synthesisintermediate
  • DFTintermediate
  • LECintermediate
  • STAintermediate
  • Silicon Bring-Upintermediate
  • Performance Fine-Tuningintermediate
  • High-Speed SerDes I/O Designintermediate
  • Protocol Knowledge (Ethernet, PCIE)intermediate
  • Verilogintermediate
  • Logic Designintermediate
  • Circuit Modelingintermediate
  • UVMintermediate
  • Custom Digital Circuit Designintermediate
  • Adaptation Algorithmsintermediate
  • FFEintermediate
  • DFEintermediate
  • CTLEintermediate
  • CDRintermediate
  • Offset Cancellationintermediate
  • Static Timing Toolsintermediate
  • Formal Verificationintermediate

Target Your Resume for "Digital Circuit Design Intern - 2026" , NVIDIA

Get personalized recommendations to optimize your resume specifically for Digital Circuit Design Intern - 2026. Takes only 15 seconds!

AI-powered keyword optimization
Skills matching & gap analysis
Experience alignment suggestions

Check Your ATS Score for "Digital Circuit Design Intern - 2026" , NVIDIA

Find out how well your resume matches this job's requirements. Get comprehensive analysis including ATS compatibility, keyword matching, skill gaps, and personalized recommendations.

ATS compatibility check
Keyword optimization analysis
Skill matching & gap identification
Format & readability score

Tags & Categories

Taiwan

Answer 10 quick questions to check your fit for Digital Circuit Design Intern - 2026 @ NVIDIA.

Quiz Challenge
10 Questions
~2 Minutes
Instant Score

Related Books and Jobs

No related jobs found at the moment.