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Manager, Digital Design - Mixed-Signal High-Speed I/O SerDes

NVIDIA

Engineering Jobs

Manager, Digital Design - Mixed-Signal High-Speed I/O SerDes

full-timePosted: Jul 25, 2025

Job Description

Are you looking for a Digital Design Manager role? As a Senior Digital Design Manager in our Mixed-Signal High-Speed I/O SerDes group, you'll lead a team working on NVIDIA's latest groundbreaking technology that enables and accelerates gaming, artificial intelligence, deep learning, and autonomous driving. Your team's designs will be consumed by standard as well as industry-leading proprietary high-speed protocols, serving as key IPs in sophisticated SoCs. You'll collaborate closely with analog designers, system architects, and other engineering teams to drive innovation and deliver high-performance solutions.What you'll be doing:Lead and mentor a team of engineers in developing mixed-signal chipsSupervise the planning and specification of algorithms, evaluating PPA (Power, Performance, Area) trade-offsGuide the design of digital circuits such as filters and analog calibration circuitsEnsure verification of digital designs using direct and random testing methodologiesLead front-end design flows (Lint/CDC/Synthesis/DFT/LEC/STA) and coordinate with back-end teams for successful chip tape-outsDrive silicon bring-up efforts and performance optimizationCollaborate with multi-functional teams to align technology roadmaps with business objectivesEstablish and maintain standard methodologies for mixed-signal design and verificationWhat we need to see:M.S. or Ph.D. in Electrical Engineering or equivalent experience and over 8 years of overall experience in mixed signalProven experience in mixed-signal chip design, with 3+ years in a leadership roleExpertise in Verilog or SystemVerilog, logic design, and circuit modeling in RTL for mixed-signal blocksStrong background in custom digital circuit design and adaptation algorithms (FFE, DFE, CTLE, CDR, offset cancellation), understanding of high-speed SerDes I/O digital design, with knowledge of protocols like Ethernet and PCIeExperience with industry-standard verification methodologies, such as UVMProficiency with static timing and formal verification toolsExcellent communication and leadership skills, with the ability to drive technical strategyNVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice and join us today!Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 196,000 USD - 310,500 USD.You will also be eligible for equity and benefits.Applications for this job will be accepted at least until July 29, 2025.NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Locations

  • Santa Clara, CA, US

Salary

Estimated Salary Rangemedium confidence

28,000,000 - 56,000,000 INR / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • Digital Design Managementintermediate
  • Mixed-Signal Chip Designintermediate
  • Team Leadershipintermediate
  • Mentoring Engineersintermediate
  • Algorithm Planningintermediate
  • PPA Trade-offs Evaluationintermediate
  • Digital Circuit Designintermediate
  • Filter Designintermediate
  • Analog Calibration Circuitsintermediate
  • Verification Methodologiesintermediate
  • Direct Testingintermediate
  • Random Testingintermediate
  • Front-End Design Flowsintermediate
  • Lintintermediate
  • CDCintermediate
  • Synthesisintermediate
  • DFTintermediate
  • LECintermediate
  • STAintermediate
  • Chip Tape-outs Coordinationintermediate
  • Silicon Bring-upintermediate
  • Performance Optimizationintermediate
  • Cross-Functional Collaborationintermediate
  • Technology Roadmap Alignmentintermediate
  • Standard Methodologies Establishmentintermediate
  • Verilogintermediate
  • SystemVerilogintermediate
  • Logic Designintermediate
  • RTL Circuit Modelingintermediate
  • Custom Digital Circuit Designintermediate
  • Adaptation Algorithmsintermediate
  • FFEintermediate
  • DFEintermediate
  • CTLEintermediate
  • CDRintermediate
  • Offset Cancellationintermediate
  • High-Speed SerDes I/O Designintermediate
  • Ethernet Protocolintermediate
  • PCIe Protocolintermediate
  • UVMintermediate
  • Static Timing Analysisintermediate

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NVIDIA logo

Manager, Digital Design - Mixed-Signal High-Speed I/O SerDes

NVIDIA

Engineering Jobs

Manager, Digital Design - Mixed-Signal High-Speed I/O SerDes

full-timePosted: Jul 25, 2025

Job Description

Are you looking for a Digital Design Manager role? As a Senior Digital Design Manager in our Mixed-Signal High-Speed I/O SerDes group, you'll lead a team working on NVIDIA's latest groundbreaking technology that enables and accelerates gaming, artificial intelligence, deep learning, and autonomous driving. Your team's designs will be consumed by standard as well as industry-leading proprietary high-speed protocols, serving as key IPs in sophisticated SoCs. You'll collaborate closely with analog designers, system architects, and other engineering teams to drive innovation and deliver high-performance solutions.What you'll be doing:Lead and mentor a team of engineers in developing mixed-signal chipsSupervise the planning and specification of algorithms, evaluating PPA (Power, Performance, Area) trade-offsGuide the design of digital circuits such as filters and analog calibration circuitsEnsure verification of digital designs using direct and random testing methodologiesLead front-end design flows (Lint/CDC/Synthesis/DFT/LEC/STA) and coordinate with back-end teams for successful chip tape-outsDrive silicon bring-up efforts and performance optimizationCollaborate with multi-functional teams to align technology roadmaps with business objectivesEstablish and maintain standard methodologies for mixed-signal design and verificationWhat we need to see:M.S. or Ph.D. in Electrical Engineering or equivalent experience and over 8 years of overall experience in mixed signalProven experience in mixed-signal chip design, with 3+ years in a leadership roleExpertise in Verilog or SystemVerilog, logic design, and circuit modeling in RTL for mixed-signal blocksStrong background in custom digital circuit design and adaptation algorithms (FFE, DFE, CTLE, CDR, offset cancellation), understanding of high-speed SerDes I/O digital design, with knowledge of protocols like Ethernet and PCIeExperience with industry-standard verification methodologies, such as UVMProficiency with static timing and formal verification toolsExcellent communication and leadership skills, with the ability to drive technical strategyNVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice and join us today!Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 196,000 USD - 310,500 USD.You will also be eligible for equity and benefits.Applications for this job will be accepted at least until July 29, 2025.NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Locations

  • Santa Clara, CA, US

Salary

Estimated Salary Rangemedium confidence

28,000,000 - 56,000,000 INR / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • Digital Design Managementintermediate
  • Mixed-Signal Chip Designintermediate
  • Team Leadershipintermediate
  • Mentoring Engineersintermediate
  • Algorithm Planningintermediate
  • PPA Trade-offs Evaluationintermediate
  • Digital Circuit Designintermediate
  • Filter Designintermediate
  • Analog Calibration Circuitsintermediate
  • Verification Methodologiesintermediate
  • Direct Testingintermediate
  • Random Testingintermediate
  • Front-End Design Flowsintermediate
  • Lintintermediate
  • CDCintermediate
  • Synthesisintermediate
  • DFTintermediate
  • LECintermediate
  • STAintermediate
  • Chip Tape-outs Coordinationintermediate
  • Silicon Bring-upintermediate
  • Performance Optimizationintermediate
  • Cross-Functional Collaborationintermediate
  • Technology Roadmap Alignmentintermediate
  • Standard Methodologies Establishmentintermediate
  • Verilogintermediate
  • SystemVerilogintermediate
  • Logic Designintermediate
  • RTL Circuit Modelingintermediate
  • Custom Digital Circuit Designintermediate
  • Adaptation Algorithmsintermediate
  • FFEintermediate
  • DFEintermediate
  • CTLEintermediate
  • CDRintermediate
  • Offset Cancellationintermediate
  • High-Speed SerDes I/O Designintermediate
  • Ethernet Protocolintermediate
  • PCIe Protocolintermediate
  • UVMintermediate
  • Static Timing Analysisintermediate

Target Your Resume for "Manager, Digital Design - Mixed-Signal High-Speed I/O SerDes" , NVIDIA

Get personalized recommendations to optimize your resume specifically for Manager, Digital Design - Mixed-Signal High-Speed I/O SerDes. Takes only 15 seconds!

AI-powered keyword optimization
Skills matching & gap analysis
Experience alignment suggestions

Check Your ATS Score for "Manager, Digital Design - Mixed-Signal High-Speed I/O SerDes" , NVIDIA

Find out how well your resume matches this job's requirements. Get comprehensive analysis including ATS compatibility, keyword matching, skill gaps, and personalized recommendations.

ATS compatibility check
Keyword optimization analysis
Skill matching & gap identification
Format & readability score

Tags & Categories

United States of America

Answer 10 quick questions to check your fit for Manager, Digital Design - Mixed-Signal High-Speed I/O SerDes @ NVIDIA.

Quiz Challenge
10 Questions
~2 Minutes
Instant Score

Related Books and Jobs

No related jobs found at the moment.