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Principal DRAM Architect – GPU Memory Solutions

NVIDIA

Engineering Jobs

Principal DRAM Architect – GPU Memory Solutions

full-timePosted: Oct 16, 2025

Job Description

NVIDIA is seeking a world-class Principal DRAM Architect to define, drive, and deliver the architecture, roadmap, and implementation of next-generation AI and graphics memory solutions! This role sits at the intersection of I/O design, advanced packaging, and process technology, with a mission to co-optimize DRAM, GPU, and system architectures to achieve unprecedented performance, efficiency, and reliability. As part of NVIDIA’s Memory Architecture team, you will shape the evolution of cutting-edge memory technologies — from TSV stacking and refresh management to advanced reliability and retention schemes — while collaborating closely with leading DRAM vendors and JEDEC working groups to influence global memory standards! Familiarity with HBM, GDDR, and LPDDR is highly valued, enabling broad architectural impact across NVIDIA’s full product portfolio spanning AI accelerators, graphics, data center, and automotive platforms.What You’ll Be Doing:Architect next-generation DRAM solutions and NVIDIA-specific implementations — including bank and stack structures, refresh mechanisms, retention schemes, ECC/CRC, power management, and reliability optimization.Lead innovation in high-speed memory interfaces, with deep expertise in HBM PHYs (wide I/O, TSV signaling, SI/PI, timing margins) and an understanding of GDDR/LPDDR PHY architectures.Collaborate across domains on advanced packaging technologies (TSVs, interposers, CoWoS, hybrid bonding, FOWLP) to optimize DRAM–GPU co-packaging for bandwidth, power, thermal performance, and yield.Evaluate emerging DRAM process nodes (sub-1x nm, EUV, new capacitor/dielectric materials) and their impact on density, power, retention, and cost.Influence industry direction by working with DRAM vendors and actively contributing to JEDEC committees, driving next-generation memory standards and NVIDIA-specific roadmap alignment.Model and quantify system-level trade-offs in bandwidth, latency, power, cost, yield, and thermal behavior to guide architectural decisions.Mentor engineers, lead technical reviews, and shape NVIDIA’s long-term memory architecture vision. What We Need to See:MS or PhD in Electrical Engineering, Computer Engineering, Physics (or equivalent experience).15+ years of experience in DRAM or memory system architecture, with at least 5+ years focused on HBM (HBM2/2e/3/3e or next-gen).Expertise in HBM architecture: TSV design, die stacking, interposer/CoWoS integration, refresh schemes, ECC/CRC, pseudo-channels, and thermal/power management.Proven participation in JEDEC or equivalent standards organizations, contributing to DRAM or HBM specifications.Demonstrated ability to influence DRAM vendor roadmaps, negotiate trade-offs, and enable early silicon validation.Strong understanding of I/O and PHY design fundamentals — timing, SI/PI, equalization, jitter budgeting.Proven experience balancing system-level trade-offs across performance, bandwidth, power, cost, yield, and reliability.Exceptional technical leadership and cross-functional communication skills. Ways to Stand Out from the Crowd:Hands-on experience with GDDR6/7 and LPDDR5/6 architectures — including bank management, signaling, power states, and error handling.Deep understanding of thermal and mechanical challenges in advanced memory packaging and 3D integration.Familiarity with emerging memory technologies (3D DRAM, MRAM, RRAM, or next-gen hybrid memory).Publications, patents, or JEDEC leadership roles demonstrating influence on memory architecture and standards.Background in high-bandwidth computing platforms — AI, HPC, or graphics accelerators. With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant people in the world working for us and, due to unprecedented growth, our teams are rapidly growing. Are you passionate about becoming a part of a best-in-class team supporting the latest in GPU and AI technology? If so, we want to hear from you.#LI-HybridYour base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 272,000 USD - 425,500 USD.You will also be eligible for equity and benefits.Applications for this job will be accepted at least until October 20, 2025.NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Locations

  • Santa Clara, CA, US

Salary

Estimated Salary Rangemedium confidence

35,000,000 - 55,000,000 INR / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • DRAM Architectureintermediate
  • I/O Designintermediate
  • Advanced Packagingintermediate
  • Process Technologyintermediate
  • TSV Stackingintermediate
  • Refresh Managementintermediate
  • Reliability Optimizationintermediate
  • Retention Schemesintermediate
  • HBMintermediate
  • GDDRintermediate
  • LPDDRintermediate
  • Bank Structuresintermediate
  • Stack Structuresintermediate
  • ECCintermediate
  • CRCintermediate
  • Power Managementintermediate
  • High-Speed Memory Interfacesintermediate
  • HBM PHYsintermediate
  • Wide I/Ointermediate
  • TSV Signalingintermediate
  • SI/PIintermediate
  • Timing Marginsintermediate
  • GDDR PHY Architecturesintermediate
  • LPDDR PHY Architecturesintermediate
  • TSVsintermediate
  • Interposersintermediate
  • CoWoSintermediate
  • Hybrid Bondingintermediate
  • FOWLPintermediate
  • DRAM-GPU Co-Packagingintermediate
  • Emerging DRAM Process Nodesintermediate
  • Sub-1x nmintermediate
  • EUVintermediate
  • Capacitor Materialsintermediate
  • Dielectric Materialsintermediate
  • JEDEC Standardsintermediate
  • System-Level Modelingintermediate
  • Bandwidth Optimizationintermediate
  • Latency Analysisintermediate
  • Power Analysisintermediate
  • Cost Analysisintermediate
  • Yield Analysisintermediate
  • Thermal Analysisintermediate

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NVIDIA logo

Principal DRAM Architect – GPU Memory Solutions

NVIDIA

Engineering Jobs

Principal DRAM Architect – GPU Memory Solutions

full-timePosted: Oct 16, 2025

Job Description

NVIDIA is seeking a world-class Principal DRAM Architect to define, drive, and deliver the architecture, roadmap, and implementation of next-generation AI and graphics memory solutions! This role sits at the intersection of I/O design, advanced packaging, and process technology, with a mission to co-optimize DRAM, GPU, and system architectures to achieve unprecedented performance, efficiency, and reliability. As part of NVIDIA’s Memory Architecture team, you will shape the evolution of cutting-edge memory technologies — from TSV stacking and refresh management to advanced reliability and retention schemes — while collaborating closely with leading DRAM vendors and JEDEC working groups to influence global memory standards! Familiarity with HBM, GDDR, and LPDDR is highly valued, enabling broad architectural impact across NVIDIA’s full product portfolio spanning AI accelerators, graphics, data center, and automotive platforms.What You’ll Be Doing:Architect next-generation DRAM solutions and NVIDIA-specific implementations — including bank and stack structures, refresh mechanisms, retention schemes, ECC/CRC, power management, and reliability optimization.Lead innovation in high-speed memory interfaces, with deep expertise in HBM PHYs (wide I/O, TSV signaling, SI/PI, timing margins) and an understanding of GDDR/LPDDR PHY architectures.Collaborate across domains on advanced packaging technologies (TSVs, interposers, CoWoS, hybrid bonding, FOWLP) to optimize DRAM–GPU co-packaging for bandwidth, power, thermal performance, and yield.Evaluate emerging DRAM process nodes (sub-1x nm, EUV, new capacitor/dielectric materials) and their impact on density, power, retention, and cost.Influence industry direction by working with DRAM vendors and actively contributing to JEDEC committees, driving next-generation memory standards and NVIDIA-specific roadmap alignment.Model and quantify system-level trade-offs in bandwidth, latency, power, cost, yield, and thermal behavior to guide architectural decisions.Mentor engineers, lead technical reviews, and shape NVIDIA’s long-term memory architecture vision. What We Need to See:MS or PhD in Electrical Engineering, Computer Engineering, Physics (or equivalent experience).15+ years of experience in DRAM or memory system architecture, with at least 5+ years focused on HBM (HBM2/2e/3/3e or next-gen).Expertise in HBM architecture: TSV design, die stacking, interposer/CoWoS integration, refresh schemes, ECC/CRC, pseudo-channels, and thermal/power management.Proven participation in JEDEC or equivalent standards organizations, contributing to DRAM or HBM specifications.Demonstrated ability to influence DRAM vendor roadmaps, negotiate trade-offs, and enable early silicon validation.Strong understanding of I/O and PHY design fundamentals — timing, SI/PI, equalization, jitter budgeting.Proven experience balancing system-level trade-offs across performance, bandwidth, power, cost, yield, and reliability.Exceptional technical leadership and cross-functional communication skills. Ways to Stand Out from the Crowd:Hands-on experience with GDDR6/7 and LPDDR5/6 architectures — including bank management, signaling, power states, and error handling.Deep understanding of thermal and mechanical challenges in advanced memory packaging and 3D integration.Familiarity with emerging memory technologies (3D DRAM, MRAM, RRAM, or next-gen hybrid memory).Publications, patents, or JEDEC leadership roles demonstrating influence on memory architecture and standards.Background in high-bandwidth computing platforms — AI, HPC, or graphics accelerators. With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant people in the world working for us and, due to unprecedented growth, our teams are rapidly growing. Are you passionate about becoming a part of a best-in-class team supporting the latest in GPU and AI technology? If so, we want to hear from you.#LI-HybridYour base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 272,000 USD - 425,500 USD.You will also be eligible for equity and benefits.Applications for this job will be accepted at least until October 20, 2025.NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Locations

  • Santa Clara, CA, US

Salary

Estimated Salary Rangemedium confidence

35,000,000 - 55,000,000 INR / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • DRAM Architectureintermediate
  • I/O Designintermediate
  • Advanced Packagingintermediate
  • Process Technologyintermediate
  • TSV Stackingintermediate
  • Refresh Managementintermediate
  • Reliability Optimizationintermediate
  • Retention Schemesintermediate
  • HBMintermediate
  • GDDRintermediate
  • LPDDRintermediate
  • Bank Structuresintermediate
  • Stack Structuresintermediate
  • ECCintermediate
  • CRCintermediate
  • Power Managementintermediate
  • High-Speed Memory Interfacesintermediate
  • HBM PHYsintermediate
  • Wide I/Ointermediate
  • TSV Signalingintermediate
  • SI/PIintermediate
  • Timing Marginsintermediate
  • GDDR PHY Architecturesintermediate
  • LPDDR PHY Architecturesintermediate
  • TSVsintermediate
  • Interposersintermediate
  • CoWoSintermediate
  • Hybrid Bondingintermediate
  • FOWLPintermediate
  • DRAM-GPU Co-Packagingintermediate
  • Emerging DRAM Process Nodesintermediate
  • Sub-1x nmintermediate
  • EUVintermediate
  • Capacitor Materialsintermediate
  • Dielectric Materialsintermediate
  • JEDEC Standardsintermediate
  • System-Level Modelingintermediate
  • Bandwidth Optimizationintermediate
  • Latency Analysisintermediate
  • Power Analysisintermediate
  • Cost Analysisintermediate
  • Yield Analysisintermediate
  • Thermal Analysisintermediate

Target Your Resume for "Principal DRAM Architect – GPU Memory Solutions" , NVIDIA

Get personalized recommendations to optimize your resume specifically for Principal DRAM Architect – GPU Memory Solutions. Takes only 15 seconds!

AI-powered keyword optimization
Skills matching & gap analysis
Experience alignment suggestions

Check Your ATS Score for "Principal DRAM Architect – GPU Memory Solutions" , NVIDIA

Find out how well your resume matches this job's requirements. Get comprehensive analysis including ATS compatibility, keyword matching, skill gaps, and personalized recommendations.

ATS compatibility check
Keyword optimization analysis
Skill matching & gap identification
Format & readability score

Tags & Categories

United States of America

Answer 10 quick questions to check your fit for Principal DRAM Architect – GPU Memory Solutions @ NVIDIA.

Quiz Challenge
10 Questions
~2 Minutes
Instant Score

Related Books and Jobs

No related jobs found at the moment.