NVIDIA MMPLEX DLA(Deep Learning Accelerator) and PVA (Programmable Vision Accelerator) teams are looking for a Senior ASIC Digital Design Engineer. In this role, you will work closely with the architecture and verification engineers to define, implement, and verify the good quality of DLA/PVA IP. DLA/PVA IPs are used in multiple chips, like Tegra, auto mobile, client, etc, which are used in NVIDIA products around the world. What you will be doing:Co-work with the architect to define module architecture/micro-architecture.Building for NVIDIA next next-generation IPsInvolved in the entire ASIC flow. What we need to see:BS/MS in electrical/computer engineering and related.3+ years experience in ASIC design. Strong design/implementation skills in Verilog. Solid understanding in timing/power optimization skills of digital design.Perl scripting skills is appreciated as a plus.ImageProcessing/ComputerVision/Deep-Learning/CPU/GPU/DSP-related experience is a big plus.Professional AI application technology is a big plusFluent English (both written and spoken) and excellent communication skillsDemonstrated ability to work independently as well as in a multi-disciplinary group environmentProactive & team work