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Senior HSIO Validation Methodology Engineer

NVIDIA

Engineering Jobs

Senior HSIO Validation Methodology Engineer

full-timePosted: Oct 17, 2025

Job Description

NVIDIA Silicon Solutions Group is seeking a versatile engineer to be part of the HW ArchDev team. The SSG team is uniquely positioned to have an end-to-end view of the product development cycle - from early arch definition, through bringup, to product release.Our ArchDev arm is a hub for all silicon and system level feature development, cost-benefit analysis, system integration solutions, and system POR alignment. As a member of this team, you will evaluate next gen silicon and define methodology, design, SW/FW, tool requirements needed for HW validation. The work you do will directly benefit the quality of NVIDIA products.What You'll Be Doing:Lead NVIDIA Product GPU/CPU/SOC IP/system level validation strategy, characterization and tuning methodology, platform/component interoperability, debug capability and tools/scripts, system, SLT, and manufacturing test requirement and lead cross-function teams (ASIC, SW, FW, Board, PHY, SI/PI etc) for development and implementation.Lead new feature silicon bring-up, validation, and debug, and coordinate product schedule to release feature with high quality at aggressive schedule.Deep dive into technically challenging High-Speed IO Pre-Si and Post-Si bugs and lead debug efforts across various teams (ASIC/FW/SW/PHY/board) to fix the issue on schedule and envision design optimization and collaborate with designer to implement for next generation.Proactively drive and identify opportunities and methods optimization and innovation for test strategies, process and workflow, validation methodology and efficiency based on project learnings and challenging.What We Need To See:BS or MS degree in Electrical/Computer Engineering or equivalent experience.8+ years working in HSIO development, bringup planning, HSIO SerDes, protocol, functional and electrical validation, SI/PI, and/or power optimization.Experience with HSIOs like PCIE/CXL/USB/UFS/MGBE etc or chip-to-chip interconnects including understanding of process/temp/voltage sensitivity on BER.Strong EE fundamentals, knowledgeable in digital design, computer architecture, power analysis, timing analysis, fault analysis, sampling, statistics, and scripting.Working experience on Pre-Si/FPGA and Post-Si validation, debug, rooting cause and fixing against product needs.Deep understanding of OS/firmware/driver structures and their interaction with HW.Hands on experience with Lab test and measurement equipment.Effective collaboration and communication, presentation skills across different functional teams.With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the technology world’s most desirable employers. We welcome you join our team with some of the most hard-working people in the world working together to promote rapid growth. Are you passionate about becoming a part of a best-in-class team supporting the latest in GPU and AI technology? If so, we want to hear from you.

Locations

  • Shanghai, China

Salary

Estimated Salary Rangemedium confidence

45,000,000 - 90,000,000 INR / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • GPU validationintermediate
  • CPU validationintermediate
  • SOC validationintermediate
  • IP validationintermediate
  • system level validationintermediate
  • characterizationintermediate
  • tuning methodologyintermediate
  • platform interoperabilityintermediate
  • component interoperabilityintermediate
  • debug capabilityintermediate
  • tools/scripts developmentintermediate
  • system test requirementsintermediate
  • SLTintermediate
  • manufacturing test requirementsintermediate
  • cross-function team leadershipintermediate
  • ASIC developmentintermediate
  • SW developmentintermediate
  • FW developmentintermediate
  • Board designintermediate
  • PHY designintermediate
  • SI/PI analysisintermediate
  • silicon bring-upintermediate
  • feature validationintermediate
  • feature debugintermediate
  • product schedulingintermediate
  • High-Speed IO Pre-Si validationintermediate
  • High-Speed IO Post-Si validationintermediate
  • bug debug leadershipintermediate
  • design optimizationintermediate
  • test strategy optimizationintermediate
  • process optimizationintermediate
  • workflow optimizationintermediate
  • validation methodologyintermediate
  • HSIO developmentintermediate
  • bringup planningintermediate
  • HSIO SerDesintermediate
  • protocol validationintermediate
  • functional validationintermediate
  • electrical validationintermediate
  • SI/PIintermediate
  • power optimizationintermediate
  • PCIEintermediate
  • CXLintermediate
  • USBintermediate
  • UFSintermediate
  • MGBEintermediate
  • chip-to-chip interconnectsintermediate
  • process sensitivity analysisintermediate
  • temperature sensitivity analysisintermediate
  • voltage sensitivity analysisintermediate

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NVIDIA logo

Senior HSIO Validation Methodology Engineer

NVIDIA

Engineering Jobs

Senior HSIO Validation Methodology Engineer

full-timePosted: Oct 17, 2025

Job Description

NVIDIA Silicon Solutions Group is seeking a versatile engineer to be part of the HW ArchDev team. The SSG team is uniquely positioned to have an end-to-end view of the product development cycle - from early arch definition, through bringup, to product release.Our ArchDev arm is a hub for all silicon and system level feature development, cost-benefit analysis, system integration solutions, and system POR alignment. As a member of this team, you will evaluate next gen silicon and define methodology, design, SW/FW, tool requirements needed for HW validation. The work you do will directly benefit the quality of NVIDIA products.What You'll Be Doing:Lead NVIDIA Product GPU/CPU/SOC IP/system level validation strategy, characterization and tuning methodology, platform/component interoperability, debug capability and tools/scripts, system, SLT, and manufacturing test requirement and lead cross-function teams (ASIC, SW, FW, Board, PHY, SI/PI etc) for development and implementation.Lead new feature silicon bring-up, validation, and debug, and coordinate product schedule to release feature with high quality at aggressive schedule.Deep dive into technically challenging High-Speed IO Pre-Si and Post-Si bugs and lead debug efforts across various teams (ASIC/FW/SW/PHY/board) to fix the issue on schedule and envision design optimization and collaborate with designer to implement for next generation.Proactively drive and identify opportunities and methods optimization and innovation for test strategies, process and workflow, validation methodology and efficiency based on project learnings and challenging.What We Need To See:BS or MS degree in Electrical/Computer Engineering or equivalent experience.8+ years working in HSIO development, bringup planning, HSIO SerDes, protocol, functional and electrical validation, SI/PI, and/or power optimization.Experience with HSIOs like PCIE/CXL/USB/UFS/MGBE etc or chip-to-chip interconnects including understanding of process/temp/voltage sensitivity on BER.Strong EE fundamentals, knowledgeable in digital design, computer architecture, power analysis, timing analysis, fault analysis, sampling, statistics, and scripting.Working experience on Pre-Si/FPGA and Post-Si validation, debug, rooting cause and fixing against product needs.Deep understanding of OS/firmware/driver structures and their interaction with HW.Hands on experience with Lab test and measurement equipment.Effective collaboration and communication, presentation skills across different functional teams.With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the technology world’s most desirable employers. We welcome you join our team with some of the most hard-working people in the world working together to promote rapid growth. Are you passionate about becoming a part of a best-in-class team supporting the latest in GPU and AI technology? If so, we want to hear from you.

Locations

  • Shanghai, China

Salary

Estimated Salary Rangemedium confidence

45,000,000 - 90,000,000 INR / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • GPU validationintermediate
  • CPU validationintermediate
  • SOC validationintermediate
  • IP validationintermediate
  • system level validationintermediate
  • characterizationintermediate
  • tuning methodologyintermediate
  • platform interoperabilityintermediate
  • component interoperabilityintermediate
  • debug capabilityintermediate
  • tools/scripts developmentintermediate
  • system test requirementsintermediate
  • SLTintermediate
  • manufacturing test requirementsintermediate
  • cross-function team leadershipintermediate
  • ASIC developmentintermediate
  • SW developmentintermediate
  • FW developmentintermediate
  • Board designintermediate
  • PHY designintermediate
  • SI/PI analysisintermediate
  • silicon bring-upintermediate
  • feature validationintermediate
  • feature debugintermediate
  • product schedulingintermediate
  • High-Speed IO Pre-Si validationintermediate
  • High-Speed IO Post-Si validationintermediate
  • bug debug leadershipintermediate
  • design optimizationintermediate
  • test strategy optimizationintermediate
  • process optimizationintermediate
  • workflow optimizationintermediate
  • validation methodologyintermediate
  • HSIO developmentintermediate
  • bringup planningintermediate
  • HSIO SerDesintermediate
  • protocol validationintermediate
  • functional validationintermediate
  • electrical validationintermediate
  • SI/PIintermediate
  • power optimizationintermediate
  • PCIEintermediate
  • CXLintermediate
  • USBintermediate
  • UFSintermediate
  • MGBEintermediate
  • chip-to-chip interconnectsintermediate
  • process sensitivity analysisintermediate
  • temperature sensitivity analysisintermediate
  • voltage sensitivity analysisintermediate

Target Your Resume for "Senior HSIO Validation Methodology Engineer" , NVIDIA

Get personalized recommendations to optimize your resume specifically for Senior HSIO Validation Methodology Engineer. Takes only 15 seconds!

AI-powered keyword optimization
Skills matching & gap analysis
Experience alignment suggestions

Check Your ATS Score for "Senior HSIO Validation Methodology Engineer" , NVIDIA

Find out how well your resume matches this job's requirements. Get comprehensive analysis including ATS compatibility, keyword matching, skill gaps, and personalized recommendations.

ATS compatibility check
Keyword optimization analysis
Skill matching & gap identification
Format & readability score

Tags & Categories

China

Answer 10 quick questions to check your fit for Senior HSIO Validation Methodology Engineer @ NVIDIA.

Quiz Challenge
10 Questions
~2 Minutes
Instant Score

Related Books and Jobs

No related jobs found at the moment.