We are now looking for Senior Signal & Power Integrity Engineer. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human imagination and intelligence. This is a dynamic team working with state of the art, unique technology. If you are someone that loves a challenge, come join this diverse team and help move the needle!What you'll be doing:Drive board/system level signal and power integrity requirementsLead board/system SI/PI design activities, including PCB stackup/material selection, design guide implementation, layout review, and post-layout analysisWork closely with Architecture, ASIC, Mixed Signal, Package, and PCB Design teams to design and ensure system SI/PI performance meets expectation before Gerber out, also work closely with Design Validation teams to support SI/PI failure analysisDevelop novel algorithms & new methodologies to improve SI/PI modeling effortsWork with Application Engineering teams to support customers w/ SI/PI questionsVNA & TDR measurements to support model correlation efforts and improve confidence in design stageWhat we need to see:MS/BS in EE or equivalent experienceMinimum 5+ years of experience as a SI/PI engineerDeep understanding of electromagnetics, specifically electromagnetic waves including transmission line theory and via propertiesProficient with HFSS, Sigrity, Hspice, and/or other simulation toolsExperienced with Cadence Allegro PCB designer and Constraints ManagerUnderstanding of high volume manufacturing variations and impact to channel signal integrityExposure to lab measurements including VNA & TDR experiencePassionate about SI/PI workGood written & verbal interpersonal skills in EnglishWays to stand out from the crowd:Familiarity with NRZ/PAM-4/Duo-binary signaling schemesExposure to interface timing budgets and system modelingFamiliarity with high-speed I/O design concepts including clock generation, transmitter & receiver design, and equalization schemesPDN analyses including model generation and time domain simulationExperience w/ Matlab, Python, and C as well as exposure to package design