Do you have expertise in CUDA kernel optimization, C++ systems programming, or compiler infrastructure? Join NVIDIA's nvFuser team to build the next-generation fusion compiler that automatically optimizes deep learning models for workloads scaling to thousands of GPUs! We're looking for engineers who excel at parallel programming and systems-level performance work and want to directly impact the future of AI compilation.The Deep Learning Frameworks Team @ NVIDIA is responsible for building nvFuser, an advanced compiler that sits at the intersection of compiler technology and high-performance computing. You'll work closely with the PyTorch Core team and collaborate with Lightning-AI/Thunder, which integrates nvFuser to accelerate PyTorch workloads. We collaborate with hardware architects, framework maintainers, and optimization experts to create compiler infrastructure that advances GPU performance, developing manual optimization techniques into systematic, automated compiler optimizations.What you'll be doingAs an nvFuser engineer, you'll work on exciting challenges in compiler technology and performance optimization! You'll design algorithms that generate highly optimized code from deep learning programs and build GPU-aware CPU runtime systems that coordinate kernel execution for maximum performance. Working directly with NVIDIA's hardware engineers, you'll master the latest GPU architectures while collaborating with optimization specialists to develop innovative techniques for emerging AI workloads. From debugging performance bottlenecks in thousand-GPU distributed systems to influencing next-generation hardware design, we push the boundaries of what's possible in AI compilation.What we need to seeMS or PhD in Computer Science, Computer Engineering, Electrical Engineering, or related field (or equivalent experience).4+ years advanced C++ programming with large codebase development, template meta-programming, and performance-critical code.Strong parallel programming experience with multi-threading, OpenMP, CUDA, MPI, NCCL, NVSHMEM, or other parallel computing technologies.Shown experience with low-level performance optimization and systematic bottleneck identification beyond basic profiling.Performance analysis skills: experience analyzing high-level programs to identify performance bottlenecks and develop optimization strategies.Collaborative problem-solving approach with adaptability in ambiguous situations, first-principles based thinking, and a sense of ownership.Excellent verbal and written communication skills.Ways to stand out from the crowdExperience with HPC/Scientific Computing: CUDA optimization, GPU programming, numerical libraries (cuBLAS, NCCL), or distributed computing.Compiler engineering background: LLVM, GCC, domain-specific language design, program analysis, or IR transformations and optimization passes.Deep technical foundation in CPU/GPU architectures, numeric libraries, modular software design, or runtime systems.Experience with large software projects, performance profiling, and demonstrated track record of rapid learning.Expertise with distributed parallelism techniques, tensor operations, auto-tuning, or performance modeling.Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 184,000 USD - 287,500 USD for Level 4, and 224,000 USD - 356,500 USD for Level 5.You will also be eligible for equity and benefits.Applications for this job will be accepted at least until July 29, 2025.NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.