The NVIDIA SOC group is looking for ASIC design/verification/infrastructures and methodologies interns. In this position, you will take part in all stages to design modern complex GPU/Tegra chips with state-of-art feature and flows, you will work directly with different global teams, as Arch/SW, ASIC Design/Verification, SOCD/Clocks/SysASIC, DFT and Physical Design teams. Additionally, you will be involved in defining and creating infrastructures and methodologies that create more efficient and flexible SOCs in future.What you’ll be doing:Participate in chip top integration and assemblyEngage in design/verification work of system-level unitsOptimize composing/verification flow, processes, and methodologiesDevelop new tools and flows to improve efficiency and qualityWhat we need to see:Pursuing a BS/MS degree from EE/CS or related majors from a prestigious university.Familiarity with verification methodology, tools, and flowUnderstanding of front-end ASIC design flow, including RTL design, synthesis, and timing analysisOutstanding analytical and problem-solving skillsProficiency in Python/Perl/JavaScript is a plusProficient in English (both written and spoken) and excellent communication skillsStrong teamwork spirit and the ability to collaborate easily with team membersNVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most experienced and talented individuals in the world working for us. If you're creative and autonomous, we want to hear from you!