Design Verification Engineer
Publicis Groupe
Design Verification Engineer
Job Description
Tremend is the newest global software engineering hub for Publicis Sapient. For over 20 years, the company has been infusing its advanced technical expertise into complex and innovative solutions that meet today's digital transformation needs and pave the way for a better and smarter future. By joining forces with Publicis Sapient we're accelerating the impact, providing a good mix of talented engineers, technology, continuous improvement, innovation, and R&D. Here, you'll have the opportunity to unleash your potential, powering up advanced software solutions for some of the world's most iconic brands. Embrace your passion for technology, creativity, and continuous improvement, and join us in making a difference through engineering.
Overview
Responsibilities:
- Full front-end chip verification from verification plans to coverage closure
- A significant input in developing the next generation of core technology products for our customers
- Lead and mentor the young generation of verification engineers on the team
Qualifications:
- Good working knowledge of System Verilog and UVM
- Experience with interconnects and memory controllers is a plus
- Experience with third party VIPs in their verification environment is a plus
- SOC level experience is a plus
- Working knowledge of regression and coverage analysis tools is required
- Has developed an environment and taken a module to verification closure OR has significantly altered an existing environment and taken a module to verification closure
- Working experience with modern revision control systems: Git, Perforce, SVN
- Working experience with JIRA or similar ticketing systems
Additional information
Besides an exciting job in a tremendous team, here's what you can expect:
- A fast-paced tech environment
- Continuous growth & learning
- Open feedback culture
- Room for own initiative & ideas
- Transparency about results & strategy
- Recognition & reward for hard work
- Working with a flexible schedule
- Medical subscription
- Meal tickets
- Extra vacation days - starting with 25 vacation days
- Many others perks.
Locations
- Global, Global
Salary
50,000 - 90,000 USD / yearly
Source: AI Estimation
* This is an estimated range based on market data and may vary based on experience and qualifications.
Required Qualifications
- Degree (experience)
Responsibilities
- Perform duties
Benefits
- general: Standard Benefits
Answer 10 quick questions to check your fit for Design Verification Engineer @ Publicis Groupe.
Related Books and Jobs
Design Verification Engineer
Publicis Groupe
Design Verification Engineer
Job Description
Tremend is the newest global software engineering hub for Publicis Sapient. For over 20 years, the company has been infusing its advanced technical expertise into complex and innovative solutions that meet today's digital transformation needs and pave the way for a better and smarter future. By joining forces with Publicis Sapient we're accelerating the impact, providing a good mix of talented engineers, technology, continuous improvement, innovation, and R&D. Here, you'll have the opportunity to unleash your potential, powering up advanced software solutions for some of the world's most iconic brands. Embrace your passion for technology, creativity, and continuous improvement, and join us in making a difference through engineering.
Overview
Responsibilities:
- Full front-end chip verification from verification plans to coverage closure
- A significant input in developing the next generation of core technology products for our customers
- Lead and mentor the young generation of verification engineers on the team
Qualifications:
- Good working knowledge of System Verilog and UVM
- Experience with interconnects and memory controllers is a plus
- Experience with third party VIPs in their verification environment is a plus
- SOC level experience is a plus
- Working knowledge of regression and coverage analysis tools is required
- Has developed an environment and taken a module to verification closure OR has significantly altered an existing environment and taken a module to verification closure
- Working experience with modern revision control systems: Git, Perforce, SVN
- Working experience with JIRA or similar ticketing systems
Additional information
Besides an exciting job in a tremendous team, here's what you can expect:
- A fast-paced tech environment
- Continuous growth & learning
- Open feedback culture
- Room for own initiative & ideas
- Transparency about results & strategy
- Recognition & reward for hard work
- Working with a flexible schedule
- Medical subscription
- Meal tickets
- Extra vacation days - starting with 25 vacation days
- Many others perks.
Locations
- Global, Global
Salary
50,000 - 90,000 USD / yearly
Source: AI Estimation
* This is an estimated range based on market data and may vary based on experience and qualifications.
Required Qualifications
- Degree (experience)
Responsibilities
- Perform duties
Benefits
- general: Standard Benefits
Answer 10 quick questions to check your fit for Design Verification Engineer @ Publicis Groupe.
Related Books and Jobs