Resume and JobRESUME AND JOB
Qualcomm logo

Signoff Static Timing Analysis CAD Engineer

Qualcomm

Signoff Static Timing Analysis CAD Engineer

Qualcomm logo

Qualcomm

full-time

Posted: October 6, 2025

Number of Vacancies: 1

Job Description

Company:Qualcomm India Private LimitedJob Area:Engineering Group, Engineering Group > Hardware EngineeringGeneral Summary:As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.Minimum Qualifications:• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.Job Title: Signoff Static Timing Analysis CAD EngineerExperience Level: 1–2 YearsLocation: Bangalore Job Summary:We are looking for a CAD STA Signoff Engineer to support and enhance static timing analysis flows and methodologies for timing signoff.The role involves working closely with design teams to ensure timing closure across multiple corners and modes, and maintaining robust CAD infrastructure for STA.The position requires Signoff Static Timing Analysis (STA) knowledge, with CAD development skills to define and develop tools and methodologies for accuracy, compute, in close collaboration with EDA Vendors and Snapdragon Design teams.Qualcomm is using leading edge internal and EDA technologies in the Signoff domain, including pioneering in genAI/ML, and enabling the latest STA features to reduce conservatism in Signoff.Key Responsibilities:Develop, maintain, and support STA signoff flows using tools like Tempus, PrimeTime or equivalent.Collaborate with design teams to debug timing issues.Automate STA workflows using Tcl, Python, or Perl to improve efficiency and consistency.Ensure correlation between implementation and signoff tools.Methodology improvement: Drive STA methodology improvements to enhance efficiency, productivity, and timing correlation for diverse Mobile, Compute, AI, IoT Snapdragon chips.Generate and review timing reports for tapeout readiness.Required Skills:1–2 years of experience in STA and CAD flow development.Strong understanding of timing concepts: setup/hold, OCV analysis, hierarchical STA, SI/noise analysis.Experience with timing tools (e.g., Synopsys PrimeTime, Cadence Tempus).Proficiency in scripting languages (Tcl, Python, Perl).Familiarity with SDC constraints, Library modeling (LVF, CCS, NLDM), and timing closure strategies.Good communication and collaboration skills.Preferred Qualifications:Bachelor’s or master’s degree in electrical engineering, VLSI, or related field.Exposure to STA, signal integrity, and noise analysis.Experience with programming languages like Pyhon, Tcl and Perl.Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.If you would like more information about this role, please contact Qualcomm Careers.

Locations

  • Bangalore, Karnataka, India

Salary

Salary not disclosed

Estimated Salary Rangemedium confidence

1,200,000 - 2,200,000 INR / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • Static Timing Analysis (STA)intermediate
  • CAD Developmentintermediate
  • Tempusintermediate
  • PrimeTimeintermediate
  • Tclintermediate
  • Pythonintermediate
  • Perlintermediate
  • GenAI/MLintermediate
  • EDA Technologiesintermediate
  • Timing Closureintermediate
  • Debugging Timing Issuesintermediate
  • Automation of Workflowsintermediate
  • Collaboration with Design Teamsintermediate
  • Correlation Analysisintermediate

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Tags & Categories

Hardware Engineering50648 GSOC Tech DTech GCAD Back-End - BDCHardware Engineering

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Qualcomm logo

Signoff Static Timing Analysis CAD Engineer

Qualcomm

Signoff Static Timing Analysis CAD Engineer

Qualcomm logo

Qualcomm

full-time

Posted: October 6, 2025

Number of Vacancies: 1

Job Description

Company:Qualcomm India Private LimitedJob Area:Engineering Group, Engineering Group > Hardware EngineeringGeneral Summary:As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.Minimum Qualifications:• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.Job Title: Signoff Static Timing Analysis CAD EngineerExperience Level: 1–2 YearsLocation: Bangalore Job Summary:We are looking for a CAD STA Signoff Engineer to support and enhance static timing analysis flows and methodologies for timing signoff.The role involves working closely with design teams to ensure timing closure across multiple corners and modes, and maintaining robust CAD infrastructure for STA.The position requires Signoff Static Timing Analysis (STA) knowledge, with CAD development skills to define and develop tools and methodologies for accuracy, compute, in close collaboration with EDA Vendors and Snapdragon Design teams.Qualcomm is using leading edge internal and EDA technologies in the Signoff domain, including pioneering in genAI/ML, and enabling the latest STA features to reduce conservatism in Signoff.Key Responsibilities:Develop, maintain, and support STA signoff flows using tools like Tempus, PrimeTime or equivalent.Collaborate with design teams to debug timing issues.Automate STA workflows using Tcl, Python, or Perl to improve efficiency and consistency.Ensure correlation between implementation and signoff tools.Methodology improvement: Drive STA methodology improvements to enhance efficiency, productivity, and timing correlation for diverse Mobile, Compute, AI, IoT Snapdragon chips.Generate and review timing reports for tapeout readiness.Required Skills:1–2 years of experience in STA and CAD flow development.Strong understanding of timing concepts: setup/hold, OCV analysis, hierarchical STA, SI/noise analysis.Experience with timing tools (e.g., Synopsys PrimeTime, Cadence Tempus).Proficiency in scripting languages (Tcl, Python, Perl).Familiarity with SDC constraints, Library modeling (LVF, CCS, NLDM), and timing closure strategies.Good communication and collaboration skills.Preferred Qualifications:Bachelor’s or master’s degree in electrical engineering, VLSI, or related field.Exposure to STA, signal integrity, and noise analysis.Experience with programming languages like Pyhon, Tcl and Perl.Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.If you would like more information about this role, please contact Qualcomm Careers.

Locations

  • Bangalore, Karnataka, India

Salary

Salary not disclosed

Estimated Salary Rangemedium confidence

1,200,000 - 2,200,000 INR / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • Static Timing Analysis (STA)intermediate
  • CAD Developmentintermediate
  • Tempusintermediate
  • PrimeTimeintermediate
  • Tclintermediate
  • Pythonintermediate
  • Perlintermediate
  • GenAI/MLintermediate
  • EDA Technologiesintermediate
  • Timing Closureintermediate
  • Debugging Timing Issuesintermediate
  • Automation of Workflowsintermediate
  • Collaboration with Design Teamsintermediate
  • Correlation Analysisintermediate

Target Your Resume for "Signoff Static Timing Analysis CAD Engineer" , Qualcomm

Get personalized recommendations to optimize your resume specifically for Signoff Static Timing Analysis CAD Engineer. Takes only 15 seconds!

AI-powered keyword optimization
Skills matching & gap analysis
Experience alignment suggestions

Check Your ATS Score for "Signoff Static Timing Analysis CAD Engineer" , Qualcomm

Find out how well your resume matches this job's requirements. Get comprehensive analysis including ATS compatibility, keyword matching, skill gaps, and personalized recommendations.

ATS compatibility check
Keyword optimization analysis
Skill matching & gap identification
Format & readability score

Tags & Categories

Hardware Engineering50648 GSOC Tech DTech GCAD Back-End - BDCHardware Engineering

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